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/linux/drivers/ata/ |
H A D | Makefile | diff 9e54eae23bc9cca0d8a955018c35b1250e09a73a Wed Jul 24 08:15:29 CEST 2013 Richard Zhu <r65037@freescale.com> ahci_imx: add ahci sata support on imx platforms
imx6q contains one Synopsys AHCI SATA controller, But it can't share ahci_platform driver with other controllers because there are some misalignments of the generic AHCI controller - the bits definitions of the HBA registers, the Vendor Specific registers, the AHCI PHY clock and the AHCI signals adjustment window(GPR13 register).
- CAP_SSS(bit20) of the HOST_CAP is writable, default value is '0', should be configured to be '1'
- bit0 (only one AHCI SATA port on imx6q) of the HOST_PORTS_IMPL should be set to be '1'.(default 0)
- One Vendor Specific register HOST_TIMER1MS(offset:0xe0) should be configured regarding to the frequency of AHB bus clock.
- Configurations of the AHCI PHY clock, and the signal parameters of the GPR13
Setup its own ahci sata driver, contained the imx6q specific initialized codes, re-use the generic ahci_platform driver, and keep the generic ahci_platform driver clean as much as possible.
tj: patch description reformatted
Signed-off-by: Richard Zhu <r65037@freescale.com> Reviewed-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Tejun Heo <tj@kernel.org>
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H A D | Kconfig | diff 9e54eae23bc9cca0d8a955018c35b1250e09a73a Wed Jul 24 08:15:29 CEST 2013 Richard Zhu <r65037@freescale.com> ahci_imx: add ahci sata support on imx platforms
imx6q contains one Synopsys AHCI SATA controller, But it can't share ahci_platform driver with other controllers because there are some misalignments of the generic AHCI controller - the bits definitions of the HBA registers, the Vendor Specific registers, the AHCI PHY clock and the AHCI signals adjustment window(GPR13 register).
- CAP_SSS(bit20) of the HOST_CAP is writable, default value is '0', should be configured to be '1'
- bit0 (only one AHCI SATA port on imx6q) of the HOST_PORTS_IMPL should be set to be '1'.(default 0)
- One Vendor Specific register HOST_TIMER1MS(offset:0xe0) should be configured regarding to the frequency of AHB bus clock.
- Configurations of the AHCI PHY clock, and the signal parameters of the GPR13
Setup its own ahci sata driver, contained the imx6q specific initialized codes, re-use the generic ahci_platform driver, and keep the generic ahci_platform driver clean as much as possible.
tj: patch description reformatted
Signed-off-by: Richard Zhu <r65037@freescale.com> Reviewed-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Tejun Heo <tj@kernel.org>
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