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| /linux/drivers/gpio/ |
| H A D | gpio-sch.c | diff 920214902502ceb0445a25b530dfe4c465cf8575 Mon Dec 08 10:38:10 CET 2014 Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> gpio: sch: Add support for Intel Quark X1000 SoC
Intel Quark X1000 provides a total of 16 GPIOs. The GPIOs are split between
the legacy I/O bridge and the GPIO controller.
GPIO-SCH is the GPIO pins on legacy bridge for Intel Quark SoC.
Intel Quark X1000 has 2 GPIOs powered by the core power well and 6 from
the suspend power well.
This piece of work is derived from Dan O'Donovan's initial work for Quark
X1000 enabling.
Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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| H A D | Kconfig | diff 920214902502ceb0445a25b530dfe4c465cf8575 Mon Dec 08 10:38:10 CET 2014 Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> gpio: sch: Add support for Intel Quark X1000 SoC
Intel Quark X1000 provides a total of 16 GPIOs. The GPIOs are split between
the legacy I/O bridge and the GPIO controller.
GPIO-SCH is the GPIO pins on legacy bridge for Intel Quark SoC.
Intel Quark X1000 has 2 GPIOs powered by the core power well and 6 from
the suspend power well.
This piece of work is derived from Dan O'Donovan's initial work for Quark
X1000 enabling.
Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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