Searched hist:"7 c83232161f609bbc452a1255f823f41afc411dd" (Results 1 – 5 of 5) sorted by relevance
/linux/arch/riscv/include/asm/ |
H A D | entry-common.h | diff 7c83232161f609bbc452a1255f823f41afc411dd Wed Oct 04 17:13:59 CEST 2023 Clément Léger <cleger@rivosinc.com> riscv: add support for misaligned trap handling in S-mode
Misalignment trap handling is only supported for M-mode and uses direct accesses to user memory. In S-mode, when handling usermode fault, this requires to use the get_user()/put_user() accessors. Implement load_u8(), store_u8() and get_insn() using these accessors for userspace and direct text access for kernel.
Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Björn Töpel <bjorn@rivosinc.com> Link: https://lore.kernel.org/r/20231004151405.521596-3-cleger@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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/linux/arch/riscv/kernel/ |
H A D | traps_misaligned.c | diff 7c83232161f609bbc452a1255f823f41afc411dd Wed Oct 04 17:13:59 CEST 2023 Clément Léger <cleger@rivosinc.com> riscv: add support for misaligned trap handling in S-mode
Misalignment trap handling is only supported for M-mode and uses direct accesses to user memory. In S-mode, when handling usermode fault, this requires to use the get_user()/put_user() accessors. Implement load_u8(), store_u8() and get_insn() using these accessors for userspace and direct text access for kernel.
Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Björn Töpel <bjorn@rivosinc.com> Link: https://lore.kernel.org/r/20231004151405.521596-3-cleger@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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H A D | traps.c | diff 7c83232161f609bbc452a1255f823f41afc411dd Wed Oct 04 17:13:59 CEST 2023 Clément Léger <cleger@rivosinc.com> riscv: add support for misaligned trap handling in S-mode
Misalignment trap handling is only supported for M-mode and uses direct accesses to user memory. In S-mode, when handling usermode fault, this requires to use the get_user()/put_user() accessors. Implement load_u8(), store_u8() and get_insn() using these accessors for userspace and direct text access for kernel.
Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Björn Töpel <bjorn@rivosinc.com> Link: https://lore.kernel.org/r/20231004151405.521596-3-cleger@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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H A D | Makefile | diff 7c83232161f609bbc452a1255f823f41afc411dd Wed Oct 04 17:13:59 CEST 2023 Clément Léger <cleger@rivosinc.com> riscv: add support for misaligned trap handling in S-mode
Misalignment trap handling is only supported for M-mode and uses direct accesses to user memory. In S-mode, when handling usermode fault, this requires to use the get_user()/put_user() accessors. Implement load_u8(), store_u8() and get_insn() using these accessors for userspace and direct text access for kernel.
Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Björn Töpel <bjorn@rivosinc.com> Link: https://lore.kernel.org/r/20231004151405.521596-3-cleger@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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/linux/arch/riscv/ |
H A D | Kconfig | diff 7c83232161f609bbc452a1255f823f41afc411dd Wed Oct 04 17:13:59 CEST 2023 Clément Léger <cleger@rivosinc.com> riscv: add support for misaligned trap handling in S-mode
Misalignment trap handling is only supported for M-mode and uses direct accesses to user memory. In S-mode, when handling usermode fault, this requires to use the get_user()/put_user() accessors. Implement load_u8(), store_u8() and get_insn() using these accessors for userspace and direct text access for kernel.
Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Björn Töpel <bjorn@rivosinc.com> Link: https://lore.kernel.org/r/20231004151405.521596-3-cleger@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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