Searched hist:"760 efe6910d5743084b586d3d0a3b65aea96fb2f" (Results 1 – 3 of 3) sorted by relevance
| /linux/drivers/usb/ |
| H A D | Kconfig | diff 760efe6910d5743084b586d3d0a3b65aea96fb2f Thu Nov 25 16:58:00 CET 2010 Mac Lin <mkl0301@gmail.com> USB: cns3xxx: Add EHCI and OHCI bus glue for cns3xxx SOCs
The CNS3XXX SOC has include USB EHCI and OHCI compatible controllers.
This patch adds the necessary glue logic to allow ehci-hcd and ohci-hcd
drivers to work on CNS3XXX
The EHCI and OHCI controllers share a common clock control and reset
bit, therefore additional check for the timming of enabling and disabling
is required. The USB bit of PLL Power Down Control is also shared by OTG,
24MHzUART clock, Crypto clock, PCIe reference clock, and Clock Scale
Generator. Therefore we only ensure it is enabled, while not disabling it.
Signed-off-by: Mac Lin <mkl0301@gmail.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
Signed-off-by: Anton Vorontsov <cbouatmailru@gmail.com>
|
| /linux/drivers/usb/host/ |
| H A D | ohci-hcd.c | diff 760efe6910d5743084b586d3d0a3b65aea96fb2f Thu Nov 25 16:58:00 CET 2010 Mac Lin <mkl0301@gmail.com> USB: cns3xxx: Add EHCI and OHCI bus glue for cns3xxx SOCs
The CNS3XXX SOC has include USB EHCI and OHCI compatible controllers.
This patch adds the necessary glue logic to allow ehci-hcd and ohci-hcd
drivers to work on CNS3XXX
The EHCI and OHCI controllers share a common clock control and reset
bit, therefore additional check for the timming of enabling and disabling
is required. The USB bit of PLL Power Down Control is also shared by OTG,
24MHzUART clock, Crypto clock, PCIe reference clock, and Clock Scale
Generator. Therefore we only ensure it is enabled, while not disabling it.
Signed-off-by: Mac Lin <mkl0301@gmail.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
Signed-off-by: Anton Vorontsov <cbouatmailru@gmail.com>
|
| H A D | Kconfig | diff 760efe6910d5743084b586d3d0a3b65aea96fb2f Thu Nov 25 16:58:00 CET 2010 Mac Lin <mkl0301@gmail.com> USB: cns3xxx: Add EHCI and OHCI bus glue for cns3xxx SOCs
The CNS3XXX SOC has include USB EHCI and OHCI compatible controllers.
This patch adds the necessary glue logic to allow ehci-hcd and ohci-hcd
drivers to work on CNS3XXX
The EHCI and OHCI controllers share a common clock control and reset
bit, therefore additional check for the timming of enabling and disabling
is required. The USB bit of PLL Power Down Control is also shared by OTG,
24MHzUART clock, Crypto clock, PCIe reference clock, and Clock Scale
Generator. Therefore we only ensure it is enabled, while not disabling it.
Signed-off-by: Mac Lin <mkl0301@gmail.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
Signed-off-by: Anton Vorontsov <cbouatmailru@gmail.com>
|