Searched hist:"5 bd2927aceba181b84286e00aa2f56e117e699c3" (Results 1 – 4 of 4) sorted by relevance
| /linux/drivers/nvme/host/ |
| H A D | apple.c | 5bd2927aceba181b84286e00aa2f56e117e699c3 Sun May 01 16:55:12 CEST 2022 Sven Peter <sven@svenpeter.dev> nvme-apple: Add initial Apple SoC NVMe driver
Apple SoCs such as the M1 come with an embedded NVMe controller that
is not attached to any PCIe bus. Additionally, it doesn't conform
to the NVMe specification and requires a bunch of changes to command
submission and IOMMU configuration to work.
Reviewed-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Sven Peter <sven@svenpeter.dev>
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| H A D | Makefile | diff 5bd2927aceba181b84286e00aa2f56e117e699c3 Sun May 01 16:55:12 CEST 2022 Sven Peter <sven@svenpeter.dev> nvme-apple: Add initial Apple SoC NVMe driver
Apple SoCs such as the M1 come with an embedded NVMe controller that
is not attached to any PCIe bus. Additionally, it doesn't conform
to the NVMe specification and requires a bunch of changes to command
submission and IOMMU configuration to work.
Reviewed-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Sven Peter <sven@svenpeter.dev>
|
| H A D | Kconfig | diff 5bd2927aceba181b84286e00aa2f56e117e699c3 Sun May 01 16:55:12 CEST 2022 Sven Peter <sven@svenpeter.dev> nvme-apple: Add initial Apple SoC NVMe driver
Apple SoCs such as the M1 come with an embedded NVMe controller that
is not attached to any PCIe bus. Additionally, it doesn't conform
to the NVMe specification and requires a bunch of changes to command
submission and IOMMU configuration to work.
Reviewed-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Sven Peter <sven@svenpeter.dev>
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| /linux/ |
| H A D | MAINTAINERS | diff 5bd2927aceba181b84286e00aa2f56e117e699c3 Sun May 01 16:55:12 CEST 2022 Sven Peter <sven@svenpeter.dev> nvme-apple: Add initial Apple SoC NVMe driver
Apple SoCs such as the M1 come with an embedded NVMe controller that
is not attached to any PCIe bus. Additionally, it doesn't conform
to the NVMe specification and requires a bunch of changes to command
submission and IOMMU configuration to work.
Reviewed-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Sven Peter <sven@svenpeter.dev>
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