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/linux/arch/sparc/math-emu/ |
H A D | math_64.c | diff 456d3d42460c1fc20ba0d27442443fcd63aaac35 Fri May 25 09:31:56 CEST 2012 David S. Miller <davem@davemloft.net> sparc64: Fix several bugs in quad floating point emulation.
UltraSPARC-T2 and later do not use the fp_exception_other trap and do not set the floating point trap type field in the %fsr at all when you try to execute an unimplemented FPU operation.
Instead, it uses the illegal_instruction trap and it leaves the floating point trap type field clear.
So we should not validate the %fsr trap type field when do_mathemu() is invoked from the illegal instruction handler.
Also, the floating point trap type field is 3 bits, not 4 bits.
Signed-off-by: David S. Miller <davem@davemloft.net>
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/linux/arch/sparc/kernel/ |
H A D | traps_64.c | diff 456d3d42460c1fc20ba0d27442443fcd63aaac35 Fri May 25 09:31:56 CEST 2012 David S. Miller <davem@davemloft.net> sparc64: Fix several bugs in quad floating point emulation.
UltraSPARC-T2 and later do not use the fp_exception_other trap and do not set the floating point trap type field in the %fsr at all when you try to execute an unimplemented FPU operation.
Instead, it uses the illegal_instruction trap and it leaves the floating point trap type field clear.
So we should not validate the %fsr trap type field when do_mathemu() is invoked from the illegal instruction handler.
Also, the floating point trap type field is 3 bits, not 4 bits.
Signed-off-by: David S. Miller <davem@davemloft.net>
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