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/linux/drivers/gpu/drm/amd/amdgpu/
H A Djpeg_v3_0.cdiff 3748424ba9f1241a532c57372806ecfdda894449 Fri Mar 20 03:54:45 CET 2020 Jack Xiao <Jack.Xiao@amd.com> drm/amdgpu: use ring structure to access rptr/wptr v2

Use ring structure to access the cpu/gpu address of rptr/wptr.

v2: merge gfx10/sdma5/sdma5.2 patches

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Djpeg_v2_0.cdiff 3748424ba9f1241a532c57372806ecfdda894449 Fri Mar 20 03:54:45 CET 2020 Jack Xiao <Jack.Xiao@amd.com> drm/amdgpu: use ring structure to access rptr/wptr v2

Use ring structure to access the cpu/gpu address of rptr/wptr.

v2: merge gfx10/sdma5/sdma5.2 patches

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Djpeg_v2_5.cdiff 3748424ba9f1241a532c57372806ecfdda894449 Fri Mar 20 03:54:45 CET 2020 Jack Xiao <Jack.Xiao@amd.com> drm/amdgpu: use ring structure to access rptr/wptr v2

Use ring structure to access the cpu/gpu address of rptr/wptr.

v2: merge gfx10/sdma5/sdma5.2 patches

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Dsi_dma.cdiff 3748424ba9f1241a532c57372806ecfdda894449 Fri Mar 20 03:54:45 CET 2020 Jack Xiao <Jack.Xiao@amd.com> drm/amdgpu: use ring structure to access rptr/wptr v2

Use ring structure to access the cpu/gpu address of rptr/wptr.

v2: merge gfx10/sdma5/sdma5.2 patches

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Dvce_v4_0.cdiff 3748424ba9f1241a532c57372806ecfdda894449 Fri Mar 20 03:54:45 CET 2020 Jack Xiao <Jack.Xiao@amd.com> drm/amdgpu: use ring structure to access rptr/wptr v2

Use ring structure to access the cpu/gpu address of rptr/wptr.

v2: merge gfx10/sdma5/sdma5.2 patches

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Dvcn_v2_0.cdiff 3748424ba9f1241a532c57372806ecfdda894449 Fri Mar 20 03:54:45 CET 2020 Jack Xiao <Jack.Xiao@amd.com> drm/amdgpu: use ring structure to access rptr/wptr v2

Use ring structure to access the cpu/gpu address of rptr/wptr.

v2: merge gfx10/sdma5/sdma5.2 patches

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Dvcn_v3_0.cdiff 3748424ba9f1241a532c57372806ecfdda894449 Fri Mar 20 03:54:45 CET 2020 Jack Xiao <Jack.Xiao@amd.com> drm/amdgpu: use ring structure to access rptr/wptr v2

Use ring structure to access the cpu/gpu address of rptr/wptr.

v2: merge gfx10/sdma5/sdma5.2 patches

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Dgfx_v6_0.cdiff 3748424ba9f1241a532c57372806ecfdda894449 Fri Mar 20 03:54:45 CET 2020 Jack Xiao <Jack.Xiao@amd.com> drm/amdgpu: use ring structure to access rptr/wptr v2

Use ring structure to access the cpu/gpu address of rptr/wptr.

v2: merge gfx10/sdma5/sdma5.2 patches

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Dvcn_v2_5.cdiff 3748424ba9f1241a532c57372806ecfdda894449 Fri Mar 20 03:54:45 CET 2020 Jack Xiao <Jack.Xiao@amd.com> drm/amdgpu: use ring structure to access rptr/wptr v2

Use ring structure to access the cpu/gpu address of rptr/wptr.

v2: merge gfx10/sdma5/sdma5.2 patches

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Dsdma_v5_2.cdiff 3748424ba9f1241a532c57372806ecfdda894449 Fri Mar 20 03:54:45 CET 2020 Jack Xiao <Jack.Xiao@amd.com> drm/amdgpu: use ring structure to access rptr/wptr v2

Use ring structure to access the cpu/gpu address of rptr/wptr.

v2: merge gfx10/sdma5/sdma5.2 patches

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Duvd_v7_0.cdiff 3748424ba9f1241a532c57372806ecfdda894449 Fri Mar 20 03:54:45 CET 2020 Jack Xiao <Jack.Xiao@amd.com> drm/amdgpu: use ring structure to access rptr/wptr v2

Use ring structure to access the cpu/gpu address of rptr/wptr.

v2: merge gfx10/sdma5/sdma5.2 patches

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Dsdma_v5_0.cdiff 3748424ba9f1241a532c57372806ecfdda894449 Fri Mar 20 03:54:45 CET 2020 Jack Xiao <Jack.Xiao@amd.com> drm/amdgpu: use ring structure to access rptr/wptr v2

Use ring structure to access the cpu/gpu address of rptr/wptr.

v2: merge gfx10/sdma5/sdma5.2 patches

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Dsdma_v2_4.cdiff 3748424ba9f1241a532c57372806ecfdda894449 Fri Mar 20 03:54:45 CET 2020 Jack Xiao <Jack.Xiao@amd.com> drm/amdgpu: use ring structure to access rptr/wptr v2

Use ring structure to access the cpu/gpu address of rptr/wptr.

v2: merge gfx10/sdma5/sdma5.2 patches

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Dcik_sdma.cdiff 3748424ba9f1241a532c57372806ecfdda894449 Fri Mar 20 03:54:45 CET 2020 Jack Xiao <Jack.Xiao@amd.com> drm/amdgpu: use ring structure to access rptr/wptr v2

Use ring structure to access the cpu/gpu address of rptr/wptr.

v2: merge gfx10/sdma5/sdma5.2 patches

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Dsdma_v3_0.cdiff 3748424ba9f1241a532c57372806ecfdda894449 Fri Mar 20 03:54:45 CET 2020 Jack Xiao <Jack.Xiao@amd.com> drm/amdgpu: use ring structure to access rptr/wptr v2

Use ring structure to access the cpu/gpu address of rptr/wptr.

v2: merge gfx10/sdma5/sdma5.2 patches

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Dsdma_v4_0.cdiff 3748424ba9f1241a532c57372806ecfdda894449 Fri Mar 20 03:54:45 CET 2020 Jack Xiao <Jack.Xiao@amd.com> drm/amdgpu: use ring structure to access rptr/wptr v2

Use ring structure to access the cpu/gpu address of rptr/wptr.

v2: merge gfx10/sdma5/sdma5.2 patches

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Dgfx_v7_0.cdiff 3748424ba9f1241a532c57372806ecfdda894449 Fri Mar 20 03:54:45 CET 2020 Jack Xiao <Jack.Xiao@amd.com> drm/amdgpu: use ring structure to access rptr/wptr v2

Use ring structure to access the cpu/gpu address of rptr/wptr.

v2: merge gfx10/sdma5/sdma5.2 patches

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Dgfx_v8_0.cdiff 3748424ba9f1241a532c57372806ecfdda894449 Fri Mar 20 03:54:45 CET 2020 Jack Xiao <Jack.Xiao@amd.com> drm/amdgpu: use ring structure to access rptr/wptr v2

Use ring structure to access the cpu/gpu address of rptr/wptr.

v2: merge gfx10/sdma5/sdma5.2 patches

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Dgfx_v10_0.cdiff 3748424ba9f1241a532c57372806ecfdda894449 Fri Mar 20 03:54:45 CET 2020 Jack Xiao <Jack.Xiao@amd.com> drm/amdgpu: use ring structure to access rptr/wptr v2

Use ring structure to access the cpu/gpu address of rptr/wptr.

v2: merge gfx10/sdma5/sdma5.2 patches

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
H A Dgfx_v9_0.cdiff 3748424ba9f1241a532c57372806ecfdda894449 Fri Mar 20 03:54:45 CET 2020 Jack Xiao <Jack.Xiao@amd.com> drm/amdgpu: use ring structure to access rptr/wptr v2

Use ring structure to access the cpu/gpu address of rptr/wptr.

v2: merge gfx10/sdma5/sdma5.2 patches

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>