Searched hist:"0 a6e92f26784b8c6a9d24c26da7278a7362531ee" (Results 1 – 2 of 2) sorted by relevance
| /linux/arch/arm64/boot/dts/intel/ |
| H A D | keembay-soc.dtsi | 0a6e92f26784b8c6a9d24c26da7278a7362531ee Fri Jul 17 11:04:13 CEST 2020 Daniele Alessandrelli <daniele.alessandrelli@intel.com> arm64: dts: keembay: Add device tree for Keem Bay SoC
Add initial device tree for Intel Movidius SoC code-named Keem Bay.
This initial DT includes nodes for Cortex-A53 cores, UARTs, GIC, PSCI,
and PMU.
Link: https://lore.kernel.org/r/20200717090414.313530-5-daniele.alessandrelli@linux.intel.com
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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| /linux/ |
| H A D | MAINTAINERS | diff 0a6e92f26784b8c6a9d24c26da7278a7362531ee Fri Jul 17 11:04:13 CEST 2020 Daniele Alessandrelli <daniele.alessandrelli@intel.com> arm64: dts: keembay: Add device tree for Keem Bay SoC
Add initial device tree for Intel Movidius SoC code-named Keem Bay.
This initial DT includes nodes for Cortex-A53 cores, UARTs, GIC, PSCI,
and PMU.
Link: https://lore.kernel.org/r/20200717090414.313530-5-daniele.alessandrelli@linux.intel.com
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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