Searched hist:"0482 a4e6de19bcfc3729dcc13b7b6dde03375bdb" (Results 1 – 4 of 4) sorted by relevance
| /linux/include/dt-bindings/reset/ |
| H A D | sun50i-h6-r-ccu.h | diff 0482a4e6de19bcfc3729dcc13b7b6dde03375bdb Sun Jan 03 11:00:04 CET 2021 Samuel Holland <samuel@sholland.org> clk: sunxi-ng: h6-r: Add R_APB2_RSB clock and reset
While no information about the H6 RSB controller is included in the
datasheet or manual, the vendor BSP and power management blob both
reference the RSB clock parent and register address. These values were
verified by experimentation.
Since this clock/reset are added late, the specifier is added at the end
to maintain the existing DT binding. The code is kept in register order.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
|
| /linux/include/dt-bindings/clock/ |
| H A D | sun50i-h6-r-ccu.h | diff 0482a4e6de19bcfc3729dcc13b7b6dde03375bdb Sun Jan 03 11:00:04 CET 2021 Samuel Holland <samuel@sholland.org> clk: sunxi-ng: h6-r: Add R_APB2_RSB clock and reset
While no information about the H6 RSB controller is included in the
datasheet or manual, the vendor BSP and power management blob both
reference the RSB clock parent and register address. These values were
verified by experimentation.
Since this clock/reset are added late, the specifier is added at the end
to maintain the existing DT binding. The code is kept in register order.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
|
| /linux/drivers/clk/sunxi-ng/ |
| H A D | ccu-sun50i-h6-r.h | diff 0482a4e6de19bcfc3729dcc13b7b6dde03375bdb Sun Jan 03 11:00:04 CET 2021 Samuel Holland <samuel@sholland.org> clk: sunxi-ng: h6-r: Add R_APB2_RSB clock and reset
While no information about the H6 RSB controller is included in the
datasheet or manual, the vendor BSP and power management blob both
reference the RSB clock parent and register address. These values were
verified by experimentation.
Since this clock/reset are added late, the specifier is added at the end
to maintain the existing DT binding. The code is kept in register order.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
|
| H A D | ccu-sun50i-h6-r.c | diff 0482a4e6de19bcfc3729dcc13b7b6dde03375bdb Sun Jan 03 11:00:04 CET 2021 Samuel Holland <samuel@sholland.org> clk: sunxi-ng: h6-r: Add R_APB2_RSB clock and reset
While no information about the H6 RSB controller is included in the
datasheet or manual, the vendor BSP and power management blob both
reference the RSB clock parent and register address. These values were
verified by experimentation.
Since this clock/reset are added late, the specifier is added at the end
to maintain the existing DT binding. The code is kept in register order.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
|