Searched +full:zynqmp +full:- +full:rtc (Results 1 – 14 of 14) sorted by relevance
/freebsd/sys/contrib/device-tree/Bindings/rtc/ |
H A D | xlnx,zynqmp-rtc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/rtc/xlnx,zynqmp-rtc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 RTC controller for the Xilinx Zynq MPSoC Real Time Clock. 11 The RTC controller has separate IRQ lines for seconds and alarm. 14 - Michal Simek <michal.simek@amd.com> 17 - $ref: rtc.yaml# 22 - const: xlnx,zynqmp-rtc 23 - items: [all …]
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H A D | xlnx-rtc.txt | 3 RTC controller for the Xilinx Zynq MPSoC Real Time Clock 7 - compatible: Should be "xlnx,zynqmp-rtc" 8 - reg: Physical base address of the controller and length 10 - interrupts: IRQ lines for the RTC. 11 - interrupt-names: interrupt line names eg. "sec" "alarm" 14 - calibration: calibration value for 1 sec period which will 18 rtc: rtc@ffa60000 { 19 compatible = "xlnx,zynqmp-rtc"; 21 interrupt-parent = <&gic>; 23 interrupt-names = "alarm", "sec";
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/freebsd/sys/contrib/device-tree/src/arm64/xilinx/ |
H A D | zynqmp-zc1751-xm017-dc3.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * dts file for Xilinx ZynqMP zc1751-xm017-dc3 5 * (C) Copyright 2016 - 2021, Xilinx, Inc. 10 /dts-v1/; 12 #include "zynqmp.dtsi" 13 #include "zynqmp [all...] |
H A D | zynqmp-zc1751-xm018-dc4.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * dts file for Xilinx ZynqMP zc1751-xm018-dc4 5 * (C) Copyright 2015 - 2021, Xilinx, Inc. 10 /dts-v1/; 12 #include "zynqmp.dtsi" 13 #include "zynqmp [all...] |
H A D | zynqmp-zc1751-xm016-dc2.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * dts file for Xilinx ZynqMP zc1751-xm016-dc2 5 * (C) Copyright 2015 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 11 /dts-v1/; 13 #include "zynqmp.dtsi" 14 #include "zynqmp-clk-ccf.dtsi" 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 19 model = "ZynqMP zc1751-xm016-dc2 RevA"; [all …]
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H A D | zynqmp-zc1751-xm015-dc1.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * dts file for Xilinx ZynqMP zc1751-xm015-dc1 5 * (C) Copyright 2015 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 11 /dts-v1/; 13 #include "zynqmp.dtsi" 14 #include "zynqmp-clk-ccf.dtsi" 15 #include <dt-bindings/phy/phy.h> 16 #include <dt-bindings/gpio/gpio.h> 17 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> [all …]
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H A D | zynqmp-sm-k26-revA.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * dts file for Xilinx ZynqMP SM-K26 rev2/1/B/A 5 * (C) Copyright 2020 - 2021, Xilinx, Inc. 6 * (C) Copyright 2023 - 2024, Advanced Micro Devices, Inc. 11 /dts-v1/; 13 #include "zynqmp.dtsi" 14 #include "zynqmp-clk-ccf.dtsi" 15 #include <dt-bindings/input/input.h> 16 #include <dt-bindings/gpio/gpio.h> 17 #include <dt-bindings/phy/phy.h> [all …]
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H A D | zynqmp-zcu104-revC.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * dts file for Xilinx ZynqMP ZCU104 5 * (C) Copyright 2017 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 11 /dts-v1/; 13 #include "zynqmp.dtsi" 14 #include "zynqmp-clk-ccf.dtsi" 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 17 #include <dt-bindings/phy/phy.h> [all …]
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H A D | zynqmp-zcu104-revA.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * dts file for Xilinx ZynqMP ZCU104 5 * (C) Copyright 2017 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 11 /dts-v1/; 13 #include "zynqmp.dtsi" 14 #include "zynqmp-clk-ccf.dtsi" 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 17 #include <dt-bindings/phy/phy.h> [all …]
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H A D | zynqmp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * dts file for Xilinx ZynqMP 5 * (C) Copyright 2014 - 2021, Xilinx, Inc. 15 #include <dt-bindings/dma/xlnx-zynqmp-dpdma.h> 16 #include <dt-bindings/gpio/gpio.h> 17 #include <dt-bindings/interrupt-controller/arm-gic.h> 18 #include <dt-bindings/interrupt-controller/irq.h> 19 #include <dt-bindings/power/xlnx-zynqmp-power.h> 20 #include <dt-bindings/reset/xlnx-zynqmp-resets.h> 23 compatible = "xlnx,zynqmp"; [all …]
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H A D | zynqmp-zcu100-revC.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * dts file for Xilinx ZynqMP ZCU100 revC 5 * (C) Copyright 2016 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 12 /dts-v1/; 14 #include "zynqmp.dtsi" 15 #include "zynqmp-clk-ccf.dtsi" 16 #include <dt-bindings/input/input.h> 17 #include <dt-bindings/interrupt-controller/irq.h> 18 #include <dt-bindings/gpio/gpio.h> [all …]
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H A D | zynqmp-zcu111-revA.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * dts file for Xilinx ZynqMP ZCU111 5 * (C) Copyright 2017 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 11 /dts-v1/; 13 #include "zynqmp.dtsi" 14 #include "zynqmp-clk-ccf.dtsi" 15 #include <dt-bindings/input/input.h> 16 #include <dt-bindings/gpio/gpio.h> 17 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> [all …]
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H A D | zynqmp-zcu106-revA.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * dts file for Xilinx ZynqMP ZCU106 5 * (C) Copyright 2016 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 11 /dts-v1/; 13 #include "zynqmp.dtsi" 14 #include "zynqmp-clk-ccf.dtsi" 15 #include <dt-bindings/input/input.h> 16 #include <dt-bindings/gpio/gpio.h> 17 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> [all …]
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H A D | zynqmp-zcu102-revA.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * dts file for Xilinx ZynqMP ZCU102 RevA 5 * (C) Copyright 2015 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 11 /dts-v1/; 13 #include "zynqmp.dtsi" 14 #include "zynqmp-clk-ccf.dtsi" 15 #include <dt-bindings/input/input.h> 16 #include <dt-bindings/gpio/gpio.h> 17 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> [all …]
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