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Searched +full:zynqmp +full:- +full:dpsub +full:- +full:1 (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/xlnx/
H A Dzynqmp_dpsub.c1 // SPDX-License-Identifier: GPL-2.0
3 * ZynqMP DisplayPort Subsystem Driver
5 * Copyright (C) 2017 - 2020 Xilinx, Inc.
8 * - Hyun Woo Kwon <hyun.kwon@xilinx.com>
9 * - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
13 #include <linux/dma-mapping.h>
31 /* -----------------------------------------------------------------------------
37 struct zynqmp_dpsub *dpsub = dev_get_drvdata(dev); in zynqmp_dpsub_suspend() local
39 if (!dpsub->drm) in zynqmp_dpsub_suspend()
42 return drm_mode_config_helper_suspend(&dpsub->drm->dev); in zynqmp_dpsub_suspend()
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H A Dzynqmp_kms.c1 // SPDX-License-Identifier: GPL-2.0
3 * ZynqMP DisplayPort Subsystem - KMS API
5 * Copyright (C) 2017 - 2021 Xilinx, Inc.
8 * - Hyun Woo Kwon <hyun.kwon@xilinx.com>
9 * - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
46 return container_of(drm, struct zynqmp_dpsub_drm, dev)->dpsub; in to_zynqmp_dpsub()
49 /* -----------------------------------------------------------------------------
60 if (!new_plane_state->crtc) in zynqmp_dpsub_plane_atomic_check()
63 crtc_state = drm_atomic_get_crtc_state(state, new_plane_state->crtc); in zynqmp_dpsub_plane_atomic_check()
79 struct zynqmp_dpsub *dpsub = to_zynqmp_dpsub(plane->dev); in zynqmp_dpsub_plane_atomic_disable() local
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H A Dzynqmp_disp.c1 // SPDX-License-Identifier: GPL-2.0
3 * ZynqMP Display Controller Driver
5 * Copyright (C) 2017 - 2020 Xilinx, Inc.
8 * - Hyun Woo Kwon <hyun.kwon@xilinx.com>
9 * - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
19 #include <linux/dma-mapping.h>
21 #include <linux/media-bus-format.h>
34 * --------
36 * The display controller part of ZynqMP DP subsystem, made of the Audio/Video
39 * +------------------------------------------------------------+
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H A Dzynqmp_dp.c1 // SPDX-License-Identifier: GPL-2.0
3 * ZynqMP DisplayPort Driver
5 * Copyright (C) 2017 - 2020 Xilinx, Inc.
8 * - Hyun Woo Kwon <hyun.kwon@xilinx.com>
9 * - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
25 #include <linux/media-bus-format.h>
58 #define ZYNQMP_DP_SOFTWARE_RESET_STREAM2 BIT(1)
92 #define ZYNQMP_DP_CORE_ID_DIRECTION GENMASK(1)
105 #define ZYNQMP_DP_INTERRUPT_SIGNAL_STATE_REQUEST BIT(1)
112 #define ZYNQMP_DP_AUX_REPLY_CODE_AUX_DEFER BIT(1)
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/linux/Documentation/devicetree/bindings/display/xlnx/
H A Dxlnx,zynqmp-dpsub.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/xlnx/xlnx,zynqmp-dpsub.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx ZynqMP DisplayPort Subsystem
10 The DisplayPort subsystem of Xilinx ZynqMP (Zynq UltraScale+ MPSoC)
14 +------------------------------------------------------------+
15 +--------+ | +----------------+ +-----------+ |
16 | DPDMA | --->| | --> | Video | Video +-------------+ |
17 | 4x vid | | | | | Rendering | -+--> | | | +------+
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/linux/arch/arm64/boot/dts/xilinx/
H A Dzynqmp.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP
5 * (C) Copyright 2014 - 2021, Xilinx, Inc.
15 #include <dt-bindings/dma/xlnx-zynqmp-dpdma.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 #include <dt-bindings/interrupt-controller/irq.h>
19 #include <dt-bindings/power/xlnx-zynqmp-power.h>
20 #include <dt-bindings/reset/xlnx-zynqmp-resets.h>
23 compatible = "xlnx,zynqmp";
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