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/freebsd/sys/contrib/device-tree/Bindings/timer/
H A Dlsi,zevio-timer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/lsi,zevio-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI-NSPIRE timer
10 - Daniel Tang <dt.tangr@gmail.com>
14 const: lsi,zevio-timer
19 - description: Timer registers
20 - description: Interrupt acknowledgement registers (optional)
29 - compatible
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H A Dlsi,zevio-timer.txt1 TI-NSPIRE timer
5 - compatible : should be "lsi,zevio-timer".
6 - reg : The physical base address and size of the timer (always first).
7 - clocks: phandle to the source clock.
11 - interrupts : The interrupt number of the first timer.
12 - reg : The interrupt acknowledgement registers
13 (always after timer base address)
15 If any of the optional properties are not given, the timer is added as a
16 clock-source only.
20 timer {
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/freebsd/sys/contrib/device-tree/src/arm/nspire/
H A Dnspire-classic.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
11 remote-endpoint = <&panel_in>;
17 /* compatible = "lsi,zevio-timer"; */
23 reg-shift = <2>;
24 reg-io-width = <4>;
26 no-loopback-test;
30 /* compatible = "lsi,zevio-timer"; */
35 compatible = "lsi,zevio-timer";
40 active-low;
45 compatible = "lsi,nspire-classic-clock";
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H A Dnspire.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #address-cells = <1>;
8 #size-cells = <1>;
9 interrupt-parent = <&intc>;
12 #address-cells = <1>;
13 #size-cells = <0>;
16 compatible = "arm,arm926ej-s";
27 compatible = "mmio-sram";
29 #address-cells = <1>;
30 #size-cells = <1>;
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