1f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0-only 2f126890aSEmmanuel Vadot/* 3f126890aSEmmanuel Vadot * Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au> 4f126890aSEmmanuel Vadot */ 5f126890aSEmmanuel Vadot 6f126890aSEmmanuel Vadot/ { 7f126890aSEmmanuel Vadot #address-cells = <1>; 8f126890aSEmmanuel Vadot #size-cells = <1>; 9f126890aSEmmanuel Vadot interrupt-parent = <&intc>; 10f126890aSEmmanuel Vadot 11f126890aSEmmanuel Vadot cpus { 12*aa1a8ff2SEmmanuel Vadot #address-cells = <1>; 13*aa1a8ff2SEmmanuel Vadot #size-cells = <0>; 14*aa1a8ff2SEmmanuel Vadot 15f126890aSEmmanuel Vadot cpu@0 { 16f126890aSEmmanuel Vadot compatible = "arm,arm926ej-s"; 17*aa1a8ff2SEmmanuel Vadot device_type = "cpu"; 18*aa1a8ff2SEmmanuel Vadot reg = <0>; 19f126890aSEmmanuel Vadot }; 20f126890aSEmmanuel Vadot }; 21f126890aSEmmanuel Vadot 22f126890aSEmmanuel Vadot bootrom: bootrom@0 { 23f126890aSEmmanuel Vadot reg = <0x00000000 0x80000>; 24f126890aSEmmanuel Vadot }; 25f126890aSEmmanuel Vadot 26f126890aSEmmanuel Vadot sram: sram@a4000000 { 27*aa1a8ff2SEmmanuel Vadot compatible = "mmio-sram"; 28*aa1a8ff2SEmmanuel Vadot reg = <0xa4000000 0x20000>; /* 128k */ 29*aa1a8ff2SEmmanuel Vadot #address-cells = <1>; 30*aa1a8ff2SEmmanuel Vadot #size-cells = <1>; 31*aa1a8ff2SEmmanuel Vadot ranges = <0 0xa4000000 0x20000>; 32*aa1a8ff2SEmmanuel Vadot 33*aa1a8ff2SEmmanuel Vadot sram@0 { 34*aa1a8ff2SEmmanuel Vadot reg = <0x0 0x20000>; 35*aa1a8ff2SEmmanuel Vadot }; 36f126890aSEmmanuel Vadot }; 37f126890aSEmmanuel Vadot 38f126890aSEmmanuel Vadot timer_clk: timer_clk { 39f126890aSEmmanuel Vadot #clock-cells = <0>; 40f126890aSEmmanuel Vadot compatible = "fixed-clock"; 41f126890aSEmmanuel Vadot clock-frequency = <32768>; 42f126890aSEmmanuel Vadot }; 43f126890aSEmmanuel Vadot 44f126890aSEmmanuel Vadot base_clk: base_clk { 45f126890aSEmmanuel Vadot #clock-cells = <0>; 46f126890aSEmmanuel Vadot reg = <0x900b0024 0x4>; 47f126890aSEmmanuel Vadot }; 48f126890aSEmmanuel Vadot 49f126890aSEmmanuel Vadot ahb_clk: ahb_clk { 50f126890aSEmmanuel Vadot #clock-cells = <0>; 51f126890aSEmmanuel Vadot reg = <0x900b0024 0x4>; 52f126890aSEmmanuel Vadot clocks = <&base_clk>; 53f126890aSEmmanuel Vadot }; 54f126890aSEmmanuel Vadot 55f126890aSEmmanuel Vadot apb_pclk: apb_pclk { 56f126890aSEmmanuel Vadot #clock-cells = <0>; 57f126890aSEmmanuel Vadot compatible = "fixed-factor-clock"; 58f126890aSEmmanuel Vadot clock-div = <2>; 59f126890aSEmmanuel Vadot clock-mult = <1>; 60f126890aSEmmanuel Vadot clocks = <&ahb_clk>; 61f126890aSEmmanuel Vadot }; 62f126890aSEmmanuel Vadot 63f126890aSEmmanuel Vadot usb_phy: usb_phy { 64f126890aSEmmanuel Vadot compatible = "usb-nop-xceiv"; 65f126890aSEmmanuel Vadot #phy-cells = <0>; 66f126890aSEmmanuel Vadot }; 67f126890aSEmmanuel Vadot 68f126890aSEmmanuel Vadot vbus_reg: vbus_reg { 69f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 70f126890aSEmmanuel Vadot 71f126890aSEmmanuel Vadot regulator-name = "USB VBUS output"; 72f126890aSEmmanuel Vadot 73f126890aSEmmanuel Vadot regulator-min-microvolt = <5000000>; 74f126890aSEmmanuel Vadot regulator-max-microvolt = <5000000>; 75f126890aSEmmanuel Vadot }; 76f126890aSEmmanuel Vadot 77f126890aSEmmanuel Vadot ahb { 78f126890aSEmmanuel Vadot compatible = "simple-bus"; 79f126890aSEmmanuel Vadot #address-cells = <1>; 80f126890aSEmmanuel Vadot #size-cells = <1>; 81f126890aSEmmanuel Vadot ranges; 82f126890aSEmmanuel Vadot 83f126890aSEmmanuel Vadot spi: spi@a9000000 { 84f126890aSEmmanuel Vadot reg = <0xa9000000 0x1000>; 85f126890aSEmmanuel Vadot }; 86f126890aSEmmanuel Vadot 87f126890aSEmmanuel Vadot usb0: usb@b0000000 { 88f126890aSEmmanuel Vadot compatible = "lsi,zevio-usb"; 89f126890aSEmmanuel Vadot reg = <0xb0000000 0x1000>; 90f126890aSEmmanuel Vadot interrupts = <8>; 91f126890aSEmmanuel Vadot 92f126890aSEmmanuel Vadot usb-phy = <&usb_phy>; 93f126890aSEmmanuel Vadot vbus-supply = <&vbus_reg>; 94f126890aSEmmanuel Vadot }; 95f126890aSEmmanuel Vadot 96f126890aSEmmanuel Vadot usb1: usb@b4000000 { 97f126890aSEmmanuel Vadot reg = <0xb4000000 0x1000>; 98f126890aSEmmanuel Vadot interrupts = <9>; 99f126890aSEmmanuel Vadot status = "disabled"; 100f126890aSEmmanuel Vadot }; 101f126890aSEmmanuel Vadot 102f126890aSEmmanuel Vadot lcd: lcd@c0000000 { 103f126890aSEmmanuel Vadot compatible = "arm,pl111", "arm,primecell"; 104f126890aSEmmanuel Vadot reg = <0xc0000000 0x1000>; 105f126890aSEmmanuel Vadot interrupts = <21>; 106f126890aSEmmanuel Vadot 107f126890aSEmmanuel Vadot /* 108f126890aSEmmanuel Vadot * We assume the same clock is fed to APB and CLCDCLK. 109f126890aSEmmanuel Vadot * There is some code to scale the clock down by a factor 110f126890aSEmmanuel Vadot * 48 for the display so likely the frequency to the 111f126890aSEmmanuel Vadot * display is 1MHz and the CLCDCLK is 48 MHz. 112f126890aSEmmanuel Vadot */ 113f126890aSEmmanuel Vadot clocks = <&apb_pclk>, <&apb_pclk>; 114f126890aSEmmanuel Vadot clock-names = "clcdclk", "apb_pclk"; 115f126890aSEmmanuel Vadot }; 116f126890aSEmmanuel Vadot 117f126890aSEmmanuel Vadot adc: adc@c4000000 { 118f126890aSEmmanuel Vadot reg = <0xc4000000 0x1000>; 119f126890aSEmmanuel Vadot interrupts = <11>; 120f126890aSEmmanuel Vadot }; 121f126890aSEmmanuel Vadot 122f126890aSEmmanuel Vadot tdes: crypto@c8010000 { 123f126890aSEmmanuel Vadot reg = <0xc8010000 0x1000>; 124f126890aSEmmanuel Vadot }; 125f126890aSEmmanuel Vadot 126f126890aSEmmanuel Vadot sha256: crypto@cc000000 { 127f126890aSEmmanuel Vadot reg = <0xcc000000 0x1000>; 128f126890aSEmmanuel Vadot }; 129f126890aSEmmanuel Vadot 130f126890aSEmmanuel Vadot apb@90000000 { 131f126890aSEmmanuel Vadot compatible = "simple-bus"; 132f126890aSEmmanuel Vadot #address-cells = <1>; 133f126890aSEmmanuel Vadot #size-cells = <1>; 134f126890aSEmmanuel Vadot clock-ranges; 135f126890aSEmmanuel Vadot ranges; 136f126890aSEmmanuel Vadot 137f126890aSEmmanuel Vadot gpio: gpio@90000000 { 138f126890aSEmmanuel Vadot compatible = "lsi,zevio-gpio"; 139f126890aSEmmanuel Vadot reg = <0x90000000 0x1000>; 140f126890aSEmmanuel Vadot interrupts = <7>; 141f126890aSEmmanuel Vadot gpio-controller; 142f126890aSEmmanuel Vadot #gpio-cells = <2>; 143f126890aSEmmanuel Vadot }; 144f126890aSEmmanuel Vadot 145f126890aSEmmanuel Vadot fast_timer: timer@90010000 { 146f126890aSEmmanuel Vadot reg = <0x90010000 0x1000>; 147f126890aSEmmanuel Vadot interrupts = <17>; 148f126890aSEmmanuel Vadot }; 149f126890aSEmmanuel Vadot 150f126890aSEmmanuel Vadot uart: serial@90020000 { 151f126890aSEmmanuel Vadot reg = <0x90020000 0x1000>; 152f126890aSEmmanuel Vadot interrupts = <1>; 153f126890aSEmmanuel Vadot }; 154f126890aSEmmanuel Vadot 155f126890aSEmmanuel Vadot timer0: timer@900c0000 { 156f126890aSEmmanuel Vadot reg = <0x900c0000 0x1000>; 157f126890aSEmmanuel Vadot clocks = <&timer_clk>, <&timer_clk>, 158f126890aSEmmanuel Vadot <&timer_clk>; 159f126890aSEmmanuel Vadot clock-names = "timer0clk", "timer1clk", 160f126890aSEmmanuel Vadot "apb_pclk"; 161f126890aSEmmanuel Vadot }; 162f126890aSEmmanuel Vadot 163f126890aSEmmanuel Vadot timer1: timer@900d0000 { 164f126890aSEmmanuel Vadot reg = <0x900d0000 0x1000>; 165f126890aSEmmanuel Vadot interrupts = <19>; 166f126890aSEmmanuel Vadot clocks = <&timer_clk>, <&timer_clk>, 167f126890aSEmmanuel Vadot <&timer_clk>; 168f126890aSEmmanuel Vadot clock-names = "timer0clk", "timer1clk", 169f126890aSEmmanuel Vadot "apb_pclk"; 170f126890aSEmmanuel Vadot }; 171f126890aSEmmanuel Vadot 172f126890aSEmmanuel Vadot watchdog: watchdog@90060000 { 173f126890aSEmmanuel Vadot compatible = "arm,primecell"; 174f126890aSEmmanuel Vadot reg = <0x90060000 0x1000>; 175f126890aSEmmanuel Vadot interrupts = <3>; 176f126890aSEmmanuel Vadot }; 177f126890aSEmmanuel Vadot 178f126890aSEmmanuel Vadot rtc: rtc@90090000 { 179f126890aSEmmanuel Vadot reg = <0x90090000 0x1000>; 180f126890aSEmmanuel Vadot interrupts = <4>; 181f126890aSEmmanuel Vadot }; 182f126890aSEmmanuel Vadot 183f126890aSEmmanuel Vadot misc: misc@900a0000 { 184*aa1a8ff2SEmmanuel Vadot compatible = "ti,nspire-misc", "syscon", "simple-mfd"; 185f126890aSEmmanuel Vadot reg = <0x900a0000 0x1000>; 186*aa1a8ff2SEmmanuel Vadot 187*aa1a8ff2SEmmanuel Vadot reboot { 188*aa1a8ff2SEmmanuel Vadot compatible = "syscon-reboot"; 189*aa1a8ff2SEmmanuel Vadot offset = <0x08>; 190*aa1a8ff2SEmmanuel Vadot value = <0x02>; 191*aa1a8ff2SEmmanuel Vadot }; 192f126890aSEmmanuel Vadot }; 193f126890aSEmmanuel Vadot 194f126890aSEmmanuel Vadot pwr: pwr@900b0000 { 195f126890aSEmmanuel Vadot reg = <0x900b0000 0x1000>; 196f126890aSEmmanuel Vadot interrupts = <15>; 197f126890aSEmmanuel Vadot }; 198f126890aSEmmanuel Vadot 199f126890aSEmmanuel Vadot keypad: input@900e0000 { 200f126890aSEmmanuel Vadot compatible = "ti,nspire-keypad"; 201f126890aSEmmanuel Vadot reg = <0x900e0000 0x1000>; 202f126890aSEmmanuel Vadot interrupts = <16>; 203f126890aSEmmanuel Vadot 204f126890aSEmmanuel Vadot scan-interval = <1000>; 205f126890aSEmmanuel Vadot row-delay = <200>; 206f126890aSEmmanuel Vadot 207f126890aSEmmanuel Vadot clocks = <&apb_pclk>; 208f126890aSEmmanuel Vadot }; 209f126890aSEmmanuel Vadot 210f126890aSEmmanuel Vadot contrast: contrast@900f0000 { 211f126890aSEmmanuel Vadot reg = <0x900f0000 0x1000>; 212f126890aSEmmanuel Vadot }; 213f126890aSEmmanuel Vadot 214f126890aSEmmanuel Vadot led: led@90110000 { 215f126890aSEmmanuel Vadot reg = <0x90110000 0x1000>; 216f126890aSEmmanuel Vadot }; 217f126890aSEmmanuel Vadot }; 218f126890aSEmmanuel Vadot }; 219f126890aSEmmanuel Vadot}; 220