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Searched +full:xspi +full:- +full:nor (Results 1 – 6 of 6) sorted by relevance

/linux/Documentation/devicetree/bindings/spi/
H A Dcdns,xspi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 # Copyright 2020-21 Cadence
4 ---
5 $id: http://devicetree.org/schemas/spi/cdns,xspi.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Cadence XSPI Controller
11 - Parshuram Thombare <pthombar@cadence.com>
14 The XSPI controller allows SPI protocol communication in
16 read/write access to slaves such as SPI-NOR flash.
21 - cdns,xspi-nor
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/linux/Documentation/devicetree/bindings/memory-controllers/
H A Drenesas,rzg3e-xspi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/renesas,rzg3e-xspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas Expanded Serial Peripheral Interface (xSPI)
10 - Biju Das <biju.das.jz@bp.renesas.com>
13 Renesas xSPI allows a SPI flash connected to the SoC to be accessed via
14 the memory-mapping or the manual command mode.
16 The flash chip itself should be represented by a subnode of the XSPI node.
19 - "jedec,spi-nor";
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/linux/drivers/memory/
H A Drenesas-rpc-if.c1 // SPDX-License-Identifier: GPL-2.0
3 * Renesas RPC-IF core driver
5 * Copyright (C) 2018-2019 Renesas Solutions Corp.
7 * Copyright (C) 2019-2020 Cogent Embedded, Inc.
19 #include <memory/renesas-rpc-if.h>
21 #include "renesas-rpc-if-regs.h"
22 #include "renesas-xspi-if-regs.h"
76 u8 addr_nbytes; /* Specified for xSPI */
77 u32 proto; /* Specified for xSPI */
100 switch (rpc->xfer_size) { in rpcif_reg_read()
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/linux/drivers/mtd/spi-nor/
H A Dsfdp.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/mtd/spi-nor.h>
14 #define SFDP_PARAM_HEADER_ID(p) (((p)->id_msb << 8) | (p)->id_lsb)
16 (((p)->parameter_table_pointer[2] << 16) | \
17 ((p)->parameter_table_pointer[1] << 8) | \
18 ((p)->parameter_table_pointer[0] << 0))
19 #define SFDP_PARAM_HEADER_PARAM_LEN(p) ((p)->length * 4)
23 #define SFDP_4BAIT_ID 0xff84 /* 4-byte Address Instruction Table */
24 #define SFDP_PROFILE1_ID 0xff05 /* xSPI Profile 1.0 table. */
31 * Register Map Offsets for Multi-Chip
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/linux/drivers/spi/
H A Dspi-cadence-xspi.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Cadence XSPI flash controller driver
3 // Copyright (C) 2020-21 Cadence
19 #include <linux/spi/spi-mem.h>
27 #define CDNS_XSPI_NAME "cadence-xspi"
31 * configure XSPI controller pin-strap settings
157 FIELD_PREP(CDNS_XSPI_CMD_P1_R1_ADDR0, (op)->addr.val & 0xff))
160 FIELD_PREP(CDNS_XSPI_CMD_P1_R2_ADDR1, ((op)->addr.val >> 8) & 0xFF) | \
161 FIELD_PREP(CDNS_XSPI_CMD_P1_R2_ADDR2, ((op)->addr.val >> 16) & 0xFF) | \
162 FIELD_PREP(CDNS_XSPI_CMD_P1_R2_ADDR3, ((op)->addr.val >> 24) & 0xFF) | \
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/linux/arch/arm64/boot/dts/renesas/
H A Drzg3e-smarc-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
13 * 0 - SD0 is connected to eMMC (default)
14 * 1 - SD0 is connected to uSD0 card
17 * 0 - Select Misc. Signals routing
18 * 1 - Select LCD
21 * 0 - Select CAN routing
22 * 1 - Select PDM
26 compatible = "renesas,rzg3e-smarcm", "renesas,r9a09g047e57", "renesas,r9a09g047";
42 reg_1p8v: regulator-1p8v {
43 compatible = "regulator-fixed";
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