Home
last modified time | relevance | path

Searched full:xgmac (Results 1 – 25 of 43) sorted by relevance

12

/linux/Documentation/devicetree/bindings/net/
H A Dcalxeda-xgmac.yaml4 $id: http://devicetree.org/schemas/net/calxeda-xgmac.yaml#
7 title: Calxeda Highbank 10Gb XGMAC Ethernet controller
10 The Calxeda XGMAC Ethernet controllers are directly connected to the
21 const: calxeda,hb-xgmac
28 Can point to at most 3 xgmac interrupts. The 1st one is the main
46 compatible = "calxeda,hb-xgmac";
/linux/drivers/vfio/platform/reset/
H A Dvfio_platform_calxedaxgmac.c3 * VFIO platform driver specialized for Calxeda xgmac reset
4 * reset code is inherited from calxeda xgmac native driver
20 #define DRIVER_DESC "Reset support for Calxeda xgmac vfio platform device"
22 /* XGMAC Register definitions */
69 module_vfio_reset_handler("calxeda,hb-xgmac", vfio_platform_calxedaxgmac_reset);
H A DKconfig4 tristate "VFIO support for calxeda xgmac reset"
6 Enables the VFIO platform driver to handle reset for Calxeda xgmac
/linux/drivers/net/ethernet/calxeda/
H A DKconfig3 tristate "Calxeda 1G/10G XGMAC Ethernet driver"
8 This is the driver for the XGMAC Ethernet IP block found on Calxeda
H A DMakefile2 obj-$(CONFIG_NET_CALXEDA_XGMAC) += xgmac.o
/linux/arch/arm64/boot/dts/amd/
H A Damd-seattle-xgbe-b.dtsi36 xgmac0: xgmac@e0700000 {
62 xgmac1: xgmac@e0900000 {
/linux/drivers/net/ethernet/sfc/siena/
H A Dfarch_regs.h1814 /* XM_ADR_LO_REG: XGMAC address register low */
1819 /* XM_ADR_HI_REG: XGMAC address register high */
1824 /* XM_GLB_CFG_REG: XGMAC global configuration */
1843 /* XM_TX_CFG_REG: XGMAC transmit configuration */
1864 /* XM_RX_CFG_REG: XGMAC receive configuration */
1904 /* XM_FC_REG: XGMAC flow control register */
1925 /* XM_PAUSE_TIME_REG: XGMAC pause time register */
1932 /* XM_TX_PARAM_REG: XGMAC transmit parameter register */
1943 /* XM_RX_PARAM_REG: XGMAC receive parameter register */
1950 /* XM_MGT_INT_MSK_REG: XGMAC management interrupt mask register */
[all …]
/linux/drivers/net/ethernet/sfc/falcon/
H A Dfarch_regs.h1814 /* XM_ADR_LO_REG: XGMAC address register low */
1819 /* XM_ADR_HI_REG: XGMAC address register high */
1824 /* XM_GLB_CFG_REG: XGMAC global configuration */
1843 /* XM_TX_CFG_REG: XGMAC transmit configuration */
1864 /* XM_RX_CFG_REG: XGMAC receive configuration */
1904 /* XM_FC_REG: XGMAC flow control register */
1925 /* XM_PAUSE_TIME_REG: XGMAC pause time register */
1932 /* XM_TX_PARAM_REG: XGMAC transmit parameter register */
1943 /* XM_RX_PARAM_REG: XGMAC receive parameter register */
1950 /* XM_MGT_INT_MSK_REG: XGMAC management interrupt mask register */
[all …]
H A Dtenxpress.c224 /* The XGMAC clock is driven from the SFX7101 312MHz clock, so in tenxpress_special_reset()
225 * a special software reset can glitch the XGMAC sufficiently for stats in tenxpress_special_reset()
/linux/drivers/net/ethernet/chelsio/cxgb3/
H A DMakefile9 xgmac.o sge.o l2t.o cxgb3_offload.o aq100x.o
/linux/Documentation/networking/device_drivers/ethernet/stmicro/
H A Dstmmac.rst35 DesignWare(R) Cores XGMAC - 10G Ethernet MAC and DesignWare(R) Cores
50 | XGMAC - 10G Ethernet MAC | 2.10a | N/A | XGMAC2+ |
227 GMAC, GMAC4/5 and XGMAC core.
276 TSO (TCP Segmentation Offload) feature is supported by GMAC > 4.x and XGMAC
494 36) HW uses XGMAC>2.10 cores::
/linux/arch/arm/boot/dts/calxeda/
H A Decx-common.dtsi204 compatible = "calxeda,hb-xgmac";
211 compatible = "calxeda,hb-xgmac";
/linux/Documentation/devicetree/bindings/phy/
H A Dcalxeda-combophy.yaml12 SGMII, PCIe) and can be assigned to different devices (SATA or XGMAC
/linux/drivers/net/ethernet/amd/xgbe/
H A Dxgbe-ptp.c26 * The Synopsys DWC ETHER XGMAC Software Driver and documentation
86 * The Synopsys DWC ETHER XGMAC Software Driver and documentation
H A Dxgbe-dcb.c26 * The Synopsys DWC ETHER XGMAC Software Driver and documentation
86 * The Synopsys DWC ETHER XGMAC Software Driver and documentation
H A Dxgbe-pci.c26 * The Synopsys DWC ETHER XGMAC Software Driver and documentation
86 * The Synopsys DWC ETHER XGMAC Software Driver and documentation
254 dev_err(dev, "xgmac ioremap failed\n"); in xgbe_pci_probe()
H A Dxgbe-main.c26 * The Synopsys DWC ETHER XGMAC Software Driver and documentation
86 * The Synopsys DWC ETHER XGMAC Software Driver and documentation
H A Dxgbe-debugfs.c26 * The Synopsys DWC ETHER XGMAC Software Driver and documentation
86 * The Synopsys DWC ETHER XGMAC Software Driver and documentation
H A Dxgbe-i2c.c26 * The Synopsys DWC ETHER XGMAC Software Driver and documentation
86 * The Synopsys DWC ETHER XGMAC Software Driver and documentation
H A Dxgbe.h26 * The Synopsys DWC ETHER XGMAC Software Driver and documentation
86 * The Synopsys DWC ETHER XGMAC Software Driver and documentation
1066 /* XGMAC/XPCS related mmio registers */
1067 void __iomem *xgmac_regs; /* XGMAC CSRs */
H A Dxgbe-desc.c26 * The Synopsys DWC ETHER XGMAC Software Driver and documentation
86 * The Synopsys DWC ETHER XGMAC Software Driver and documentation
/linux/drivers/clk/baikal-t1/
H A Dccu-div.h19 * @CCU_SYS_XGMAC_CLK: CCU XGMAC internal clock
/linux/arch/arm/mach-highbank/
H A Dhighbank.c84 else if (of_device_is_compatible(dev->of_node, "calxeda,hb-xgmac")) { in highbank_platform_notifier()
/linux/drivers/net/ethernet/stmicro/stmmac/
H A Ddwxgmac2_core.c4 * stmmac XGMAC support.
1254 /* XGMAC Core has 4 PPS outputs at most. in dwxgmac2_flex_pps_config()
1256 * Prior XGMAC Core 3.20, Fixed mode or Flexible mode are selectable for in dwxgmac2_flex_pps_config()
1262 * From XGMAC Core 3.20 and later, PPSEN{0,1,2,3} are writable and must in dwxgmac2_flex_pps_config()
H A Ddwxgmac2_dma.c4 * stmmac XGMAC support.
420 * XGMAC is equal to L3L4FNUM. From L3L4FNUM >= 8 the number of in dwxgmac2_get_hw_feature()

12