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/linux/Documentation/devicetree/bindings/phy/
H A Dnvidia,tegra20-usb-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra20-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dmitry Osipenko <digetx@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12 - Thierry Reding <thierry.reding@gmail.com>
17 - items:
18 - enum:
19 - nvidia,tegra124-usb-phy
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/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra30-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra30-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/soc/tegra-pmc.h>
8 #include <dt-bindings/thermal/thermal.h>
10 #include "tegra30-peripherals-opp.dtsi"
14 interrupt-parent = <&lic>;
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H A Dtegra124.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra124-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra124-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/reset/tegra124-car.h>
8 #include <dt-bindings/thermal/tegra124-soctherm.h>
9 #include <dt-bindings/soc/tegra-pmc.h>
11 #include "tegra124-peripherals-opp.dtsi"
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H A Dtegra114.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra114-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra114-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/soc/tegra-pmc.h>
11 interrupt-parent = <&lic>;
12 #address-cells = <1>;
13 #size-cells = <1>;
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H A Dtegra30-asus-tf201.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra30-asus-transformer-common.dtsi"
5 #include "tegra30-asus-lvds-display.dtsi"
19 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
27 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
35 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
43 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
51 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
57 /* Azurewave AW-NH615 BCM4329B1 */
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H A Dtegra114-tn7.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
15 linux,initrd-start = <0x82000000>;
16 linux,initrd-end = <0x82800000>;
24 trusted-foundations {
25 compatible = "tlm,trusted-foundations";
26 tlm,version-major = <2>;
27 tlm,version-minor = <8>;
40 avdd-dsi-csi-supply = <&vdd_1v2_ap>;
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H A Dtegra114-roth.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
15 linux,initrd-start = <0x82000000>;
16 linux,initrd-end = <0x82800000>;
24 trusted-foundations {
25 compatible = "tlm,trusted-foundations";
26 tlm,version-major = <2>;
27 tlm,version-minor = <8>;
40 avdd-dsi-csi-supply = <&vdd_1v2_ap>;
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H A Dtegra20.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra20-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra20-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/soc/tegra-pmc.h>
9 #include "tegra20-peripherals-opp.dtsi"
13 interrupt-parent = <&lic>;
14 #address-cells = <1>;
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H A Dtegra20-acer-a500-picasso.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/atmel-maxtouch.h>
5 #include <dt-bindings/input/gpio-keys.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/thermal/thermal.h>
10 #include "tegra20-cpu-opp.dtsi"
11 #include "tegra20-cpu-opp-microvolt.dtsi"
32 * pre-existing /chosen node to be available to insert the
41 reserved-memory {
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H A Dtegra20-asus-tf101.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/atmel-maxtouch.h>
5 #include <dt-bindings/input/gpio-keys.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/thermal/thermal.h>
10 #include "tegra20-cpu-opp.dtsi"
11 #include "tegra20-cpu-opp-microvolt.dtsi"
16 chassis-type = "convertible";
33 * pre-existing /chosen node to be available to insert the
[all …]
/linux/sound/soc/fsl/
H A Dfsl_xcvr.c1 // SPDX-License-Identifier: GPL-2.0
19 #include "imx-pcm.h"
73 * HDMI2.1 spec defines 6- and 12-channels layout for one bit audio
110 struct fsl_xcvr *xcvr = snd_soc_dai_get_drvdata(dai); in fsl_xcvr_arc_mode_put() local
111 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in fsl_xcvr_arc_mode_put()
112 unsigned int *item = ucontrol->value.enumerated.item; in fsl_xcvr_arc_mode_put()
114 xcvr in fsl_xcvr_arc_mode_put()
123 struct fsl_xcvr *xcvr = snd_soc_dai_get_drvdata(dai); fsl_xcvr_arc_mode_get() local
155 struct fsl_xcvr *xcvr = snd_soc_dai_get_drvdata(dai); fsl_xcvr_capds_get() local
166 struct fsl_xcvr *xcvr = snd_soc_dai_get_drvdata(dai); fsl_xcvr_capds_put() local
213 struct fsl_xcvr *xcvr = snd_soc_dai_get_drvdata(dai); fsl_xcvr_mode_put() local
236 struct fsl_xcvr *xcvr = snd_soc_dai_get_drvdata(dai); fsl_xcvr_mode_get() local
251 fsl_xcvr_ai_write(struct fsl_xcvr * xcvr,u8 reg,u32 data,bool phy) fsl_xcvr_ai_write() argument
274 fsl_xcvr_en_phy_pll(struct fsl_xcvr * xcvr,u32 freq,bool tx) fsl_xcvr_en_phy_pll() argument
387 fsl_xcvr_en_aud_pll(struct fsl_xcvr * xcvr,u32 freq) fsl_xcvr_en_aud_pll() argument
441 struct fsl_xcvr *xcvr = snd_soc_dai_get_drvdata(dai); fsl_xcvr_prepare() local
566 struct fsl_xcvr *xcvr = snd_soc_dai_get_drvdata(dai); fsl_xcvr_startup() local
618 struct fsl_xcvr *xcvr = snd_soc_dai_get_drvdata(dai); fsl_xcvr_shutdown() local
666 struct fsl_xcvr *xcvr = snd_soc_dai_get_drvdata(dai); fsl_xcvr_trigger() local
792 fsl_xcvr_load_firmware(struct fsl_xcvr * xcvr) fsl_xcvr_load_firmware() argument
892 struct fsl_xcvr *xcvr = snd_soc_dai_get_drvdata(dai); fsl_xcvr_rx_cs_get() local
903 struct fsl_xcvr *xcvr = snd_soc_dai_get_drvdata(dai); fsl_xcvr_tx_cs_get() local
914 struct fsl_xcvr *xcvr = snd_soc_dai_get_drvdata(dai); fsl_xcvr_tx_cs_put() local
963 struct fsl_xcvr *xcvr = snd_soc_dai_get_drvdata(dai); fsl_xcvr_dai_probe() local
1068 struct fsl_xcvr *xcvr = dev_get_drvdata(dev); fsl_xcvr_readable_reg() local
1141 struct fsl_xcvr *xcvr = dev_get_drvdata(dev); fsl_xcvr_writeable_reg() local
1211 struct fsl_xcvr *xcvr = container_of(work, struct fsl_xcvr, work_rst); reset_rx_work() local
1239 struct fsl_xcvr *xcvr = (struct fsl_xcvr *)devid; irq0_isr() local
1369 struct fsl_xcvr *xcvr; fsl_xcvr_probe() local
1484 struct fsl_xcvr *xcvr = dev_get_drvdata(&pdev->dev); fsl_xcvr_remove() local
1492 struct fsl_xcvr *xcvr = dev_get_drvdata(dev); fsl_xcvr_runtime_suspend() local
1516 struct fsl_xcvr *xcvr = dev_get_drvdata(dev); fsl_xcvr_runtime_resume() local
[all...]
/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra132.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra124-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra124-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/thermal/tegra124-soctherm.h>
9 #include <dt-bindings/soc/tegra-pmc.h>
11 #include "tegra132-peripherals-opp.dtsi"
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/linux/drivers/scsi/isci/
H A Dhost.c7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
100 * NORMALIZE_PUT_POINTER() -
110 * NORMALIZE_EVENT_POINTER() -
122 * NORMALIZE_GET_POINTER() -
131 * NORMALIZE_GET_POINTER_CYCLE_BIT() -
137 ((SMU_CQGR_CYCLE_BIT & (x)) << (31 - SMU_COMPLETION_QUEUE_GET_CYCLE_BIT_SHIFT))
140 * COMPLETION_QUEUE_CYCLE_BIT() -
152 sm->initial_state_id = initial_state; in sci_init_sm()
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/linux/drivers/net/ethernet/amd/pds_core/
H A Dadminq.c1 // SPDX-License-Identifier: GPL-2.0
16 struct pdsc *pdsc = qcq->pdsc; in pdsc_process_notifyq()
17 struct pdsc_cq *cq = &qcq->cq; in pdsc_process_notifyq()
22 cq_info = &cq->info[cq->tail_idx]; in pdsc_process_notifyq()
23 comp = cq_info->comp; in pdsc_process_notifyq()
24 eid = le64_to_cpu(comp->event.eid); in pdsc_process_notifyq()
25 while (eid > pdsc->last_eid) { in pdsc_process_notifyq()
26 u16 ecode = le16_to_cpu(comp->event.ecode); in pdsc_process_notifyq()
30 dev_info(pdsc->dev, "NotifyQ LINK_CHANGE ecode %d eid %lld\n", in pdsc_process_notifyq()
36 dev_info(pdsc->dev, "NotifyQ RESET ecode %d eid %lld\n", in pdsc_process_notifyq()
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/linux/drivers/net/ethernet/dec/tulip/
H A Dmedia.c5 Written/copyright 1994-2001 by Donald Becker.
21 met by back-to-back PCI I/O cycles, but we insert a delay to avoid
25 /* Read and write the MII registers using software-generated serial
41 Read and write the MII registers using software-generated serial
43 See IEEE 802.3-2002.pdf (Section 2, Chapter "22.2.4 Management functions")
53 void __iomem *ioaddr = tp->base_addr; in tulip_mdio_read()
60 if (tp->chip_id == COMET && phy_id == 30) { in tulip_mdio_read()
66 spin_lock_irqsave(&tp->mii_lock, flags); in tulip_mdio_read()
67 if (tp->chip_id == LC82C168) { in tulip_mdio_read()
71 for (i = 1000; i >= 0; --i) { in tulip_mdio_read()
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H A Dtulip_core.c1 /* tulip_core.c: A DEC 21x4x-family ethernet driver for Linux.
4 Written/copyright 1994-2001 by Donald Becker.
33 /* A few user-configurable values. */
39 /* Used to pass the full-duplex flag, etc. */
47 "10baseT-FDX", "100baseTx-FDX", "100baseT4", "100baseFx",
48 "100baseFx-FDX", "MII 10baseT", "MII 10baseT-FDX", "MII",
49 "10baseT(forced)", "MII 100baseTx", "MII 100baseTx-FDX", "MII 100baseT4",
50 "MII 100baseFx-HDX", "MII 100baseFx-FDX", "Home-PNA 1Mbps", "Invalid-19",
54 /* Set the copy breakpoint for the copy-only-tiny-buffer Rx structure. */
73 ToDo: Non-Intel setting could be better.
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/linux/drivers/net/ethernet/8390/
H A Dlib8390.c1 // SPDX-License-Identifier: GPL-1.0+
5 Written 1992-94 by Donald Becker.
16 This is the chip-specific code for many 8390-based ethernet adaptors.
17 This is not a complete driver, it must be combined with board-specific
23 you have found something that needs changing. -- PG
39 Paul Gortmaker : add kmod support for auto-loading of the 8390
79 /* These are the operational function interfaces to board-specific
88 "page" value uses the 8390's 256-byte pages.
97 #define ei_reset_8390 (ei_local->reset_8390)
98 #define ei_block_output (ei_local->block_output)
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H A Daxnet_cs.c1 // SPDX-License-Identifier: GPL-1.0+
5 A PCMCIA ethernet driver for Asix AX88190-based cards
7 The Asix AX88190 is a NS8390-derived chipset with a few nasty
14 Copyright (C) 2001 David A. Hinds -- dahinds@users.sourceforge.net
52 #define AXNET_DATAPORT 0x10 /* NatSemi-defined port window offset. */
146 dev_dbg(&link->dev, "axnet_attach()\n"); in axnet_probe()
150 return -ENOMEM; in axnet_probe()
153 spin_lock_init(&ei_local->page_lock); in axnet_probe()
156 info->p_dev = link; in axnet_probe()
157 link->priv = dev; in axnet_probe()
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/linux/drivers/net/ethernet/smsc/
H A Dsmc91c92_cs.c3 A PCMCIA ethernet driver for SMC91c92-based cards.
9 Copyright (C) 1999 David A. Hinds -- dahinds@users.sourceforge.net
14 (becker@scyld.com), Rowan Hughes (x-csrdh@jcu.edu.au),
239 /* BANK 3 -- not the same values as in smc9194! */
307 dev_dbg(&link->dev, "smc91c92_attach()\n"); in smc91c92_probe()
312 return -ENOMEM; in smc91c92_probe()
314 smc->p_dev = link; in smc91c92_probe()
315 link->priv = dev; in smc91c92_probe()
317 spin_lock_init(&smc->lock); in smc91c92_probe()
319 /* The SMC91c92-specific entries in the device structure. */ in smc91c92_probe()
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