Searched +full:wo +full:- +full:boot (Results 1 – 8 of 8) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt7622-wed.yaml#5 $schema: http://devicetree.org/meta-schema[all...]
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)7 #include <dt-bindings/interrupt-controller/irq.h>8 #include <dt-bindings/interrupt-controller/arm-gic.h>9 #include <dt-bindings/clock/mt7986-clk.h>10 #include <dt-bindings/reset/mt7986-resets.h>11 #include <dt-bindings/phy/phy.h>15 interrupt-parent = <&gic>;16 #address-cells = <2>;17 #size-cells = <2>;20 #address-cells = <1>;[all …]
2 SPDX-License-Identifier: BSD-3-Clause4 Copyright (c) 2001-2020, Intel Corporation38 #define E1000_CTRL 0x00000 /* Device Control - RW */39 #define E1000_CTRL_DUP 0x00004 /* Device Control Duplicate (Shadow) - RW */40 #define E1000_STATUS 0x00008 /* Device Status - RO */41 #define E1000_EECD 0x00010 /* EEPROM/Flash Control - RW */42 #define E1000_EERD 0x00014 /* EEPROM Read - RW */43 #define E1000_CTRL_EXT 0x00018 /* Extended Device Control - RW */44 #define E1000_FLA 0x0001C /* Flash Access - RW */45 #define E1000_MDIC 0x00020 /* MDI Control - RW */[all …]
1 /*-4 * SPDX-License-Identifier: BSD-3-Clause11 #define IGC_CTRL 0x00000 /* Device Control - RW */12 #define IGC_STATUS 0x00008 /* Device Status - RO */13 #define IGC_EECD 0x00010 /* EEPROM/Flash Control - RW */15 #define IGC_EERD 0x12014 /* EEprom mode read - RW */16 #define IGC_EEWR 0x12018 /* EEprom mode write - RW */17 #define IGC_CTRL_EXT 0x00018 /* Extended Device Control - RW */18 #define IGC_MDIC 0x00020 /* MDI Control - RW */19 #define IGC_MDICNFG 0x00E04 /* MDI Config - RW */[all …]
2 SPDX-License-Identifier: BSD-3-Clause4 Copyright (c) 2001-2020, Intel Corporation42 * - IXGBE_ERROR_INVALID_STATE48 * - IXGBE_ERROR_POLLING53 * - IXGBE_ERROR_CAUTION58 * - IXGBE_ERROR_SOFTWARE64 * - IXGBE_ERROR_ARGUMENT69 * - IXGBE_ERROR_UNSUPPORTED162 #define IXGBE_BY_MAC(_hw, r) ((_hw)->mvals[IXGBE_CAT(r, _IDX)])419 (0x012300 + (((_i) - 24) * 4)))[all …]
1 /*-34 * Copyright(c) 2001-2024, Broadcom. All rights reserved. The71 * * 0x0-0xFFF8 - The function ID72 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors73 * * 0xFFFD - Reserved for user-space HWRM interface74 * * 0xFFFF - HWRM122 /* Engine CKV - The Alias key EC curve and ECC public key information. */124 /* Engine CKV - Initialization vector. */126 /* Engine CKV - Authentication tag. */128 /* Engine CKV - The encrypted data. */[all …]
24752 boot99810 Jean-Christophe99811 Jean-Pierre233115 wo
2 * Copyright (c) 2017-2018 Cavium, Inc. 78 …- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl…79 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea…80 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn…81 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea…88 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of …90 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…116 … (0x1<<9) // Fast back-to-back transaction ena…128 … (0x1<<23) // Fast back-to-back capable. Not ap…145 …l has_io_bar=0. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…[all …]