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/linux/tools/perf/pmu-events/arch/x86/elkhartlake/
H A D	memory.json	31 "BriefDescription": "Counts all code reads that were supplied by DRAM.", 37 …"PublicDescription": "Counts all code reads that were supplied by DRAM. Available PDIST counters: … 42 "BriefDescription": "Counts all code reads that were not supplied by the L3 cache.", 48 …"PublicDescription": "Counts all code reads that were not supplied by the L3 cache. Available PDIS… 53 "BriefDescription": "Counts all code reads that were not supplied by the L3 cache.", 59 …"PublicDescription": "Counts all code reads that were not supplied by the L3 cache. Available PDIS… 64 "BriefDescription": "Counts all code reads that were supplied by DRAM.", 70 …"PublicDescription": "Counts all code reads that were supplied by DRAM. Available PDIST counters: … 75 …"BriefDescription": "Counts modified writebacks from L1 cache and L2 cache that were not supplied … 81 …"PublicDescription": "Counts modified writebacks from L1 cache and L2 cache that were not supplied… [all …]
H A D	cache.json	279 "BriefDescription": "Counts the number of memory uops retired that were splits.", 285 …"PublicDescription": "Counts the number of memory uops retired that were splits. Available PDIST c… 312 "BriefDescription": "Counts all code reads that were supplied by the L3 cache.", 318 …"PublicDescription": "Counts all code reads that were supplied by the L3 cache. Available PDIST co… 323 …"BriefDescription": "Counts all code reads that were supplied by the L3 cache where a snoop was se… 329 …"PublicDescription": "Counts all code reads that were supplied by the L3 cache where a snoop was s… 334 …"BriefDescription": "Counts all code reads that were supplied by the L3 cache where a snoop was se… 340 …"PublicDescription": "Counts all code reads that were supplied by the L3 cache where a snoop was s… 345 …"BriefDescription": "Counts all code reads that were supplied by the L3 cache where a snoop was se… 351 …"PublicDescription": "Counts all code reads that were supplied by the L3 cache where a snoop was s… [all …]
H A D	pipeline.json	307 …"BriefDescription": "Counts the total number of issue slots that were not consumed by the backend … 311 …were not consumed by the backend because allocation is stalled due to a mispredicted jump or a mac… 316 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba… 324 …"BriefDescription": "Counts the total number of issue slots that were not consumed by the backend … 332 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba… 349 …"BriefDescription": "Counts the total number of issue slots every cycle that were not consumed by … 356 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba… 364 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba… 372 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba… 380 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba… [all …]
/linux/tools/perf/pmu-events/arch/x86/snowridgex/
H A D	memory.json	31 "BriefDescription": "Counts all code reads that were supplied by DRAM.", 37 …"PublicDescription": "Counts all code reads that were supplied by DRAM. Available PDIST counters: … 42 "BriefDescription": "Counts all code reads that were not supplied by the L3 cache.", 48 …"PublicDescription": "Counts all code reads that were not supplied by the L3 cache. Available PDIS… 53 "BriefDescription": "Counts all code reads that were not supplied by the L3 cache.", 59 …"PublicDescription": "Counts all code reads that were not supplied by the L3 cache. Available PDIS… 64 "BriefDescription": "Counts all code reads that were supplied by DRAM.", 70 …"PublicDescription": "Counts all code reads that were supplied by DRAM. Available PDIST counters: … 75 …"BriefDescription": "Counts modified writebacks from L1 cache and L2 cache that were not supplied … 81 …"PublicDescription": "Counts modified writebacks from L1 cache and L2 cache that were not supplied… [all …]
H A D	cache.json	279 "BriefDescription": "Counts the number of memory uops retired that were splits.", 285 …"PublicDescription": "Counts the number of memory uops retired that were splits. Available PDIST c… 312 "BriefDescription": "Counts all code reads that were supplied by the L3 cache.", 318 …"PublicDescription": "Counts all code reads that were supplied by the L3 cache. Available PDIST co… 323 …"BriefDescription": "Counts all code reads that were supplied by the L3 cache where a snoop was se… 329 …"PublicDescription": "Counts all code reads that were supplied by the L3 cache where a snoop was s… 334 …"BriefDescription": "Counts all code reads that were supplied by the L3 cache where a snoop was se… 340 …"PublicDescription": "Counts all code reads that were supplied by the L3 cache where a snoop was s… 345 …"BriefDescription": "Counts all code reads that were supplied by the L3 cache where a snoop was se… 351 …"PublicDescription": "Counts all code reads that were supplied by the L3 cache where a snoop was s… [all …]
H A D	pipeline.json	307 …"BriefDescription": "Counts the total number of issue slots that were not consumed by the backend … 311 …were not consumed by the backend because allocation is stalled due to a mispredicted jump or a mac… 316 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba… 324 …"BriefDescription": "Counts the total number of issue slots that were not consumed by the backend … 332 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba… 349 …"BriefDescription": "Counts the total number of issue slots every cycle that were not consumed by … 356 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba… 364 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba… 372 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba… 380 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba… [all …]
/linux/tools/perf/pmu-events/arch/x86/alderlaken/
H A D	memory.json	60 …Counts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM.", 66 …ounts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM. A… 71 …ounts demand instruction fetches and L1 instruction cache prefetches that were not supplied by the… 77 …ounts demand instruction fetches and L1 instruction cache prefetches that were not supplied by the… 82 "BriefDescription": "Counts demand data reads that were supplied by DRAM.", 88 …"PublicDescription": "Counts demand data reads that were supplied by DRAM. Available PDIST counter… 93 "BriefDescription": "Counts demand data reads that were not supplied by the L3 cache.", 99 …"PublicDescription": "Counts demand data reads that were not supplied by the L3 cache. Available P… 104 …"BriefDescription": "Counts demand data reads that were not supplied by the L3 cache. [L3_MISS_LOC… 110 …"PublicDescription": "Counts demand data reads that were not supplied by the L3 cache. [L3_MISS_LO… [all …]
H A D	adln-metrics.json	74 …"BriefDescription": "Counts the number of issue slots that were not consumed by the backend due to… 82 …"BriefDescription": "Counts the total number of issue slots that were not consumed by the backend … 89 …"PublicDescription": "Counts the total number of issue slots that were not consumed by the backend… 93 …"BriefDescription": "Counts the total number of issue slots that were not consumed by the backend … 100 …were not consumed by the backend because allocation is stalled due to a mispredicted jump or a mac… 104 …"BriefDescription": "Counts the number of issue slots that were not delivered by the frontend due … 109 …"PublicDescription": "Counts the number of issue slots that were not delivered by the frontend due… 113 …"BriefDescription": "Counts the number of issue slots that were not consumed by the backend due to… 122 …"BriefDescription": "Counts the number of issue slots that were not delivered by the frontend due … 130 …"BriefDescription": "Counts the number of issue slots that were not delivered by the frontend due … [all …]
H A D	cache.json	422 …ounts demand instruction fetches and L1 instruction cache prefetches that were supplied by the L3 … 428 …ounts demand instruction fetches and L1 instruction cache prefetches that were supplied by the L3 … 433 …ounts demand instruction fetches and L1 instruction cache prefetches that were supplied by the L3 … 439 …ounts demand instruction fetches and L1 instruction cache prefetches that were supplied by the L3 … 444 …ounts demand instruction fetches and L1 instruction cache prefetches that were supplied by the L3 … 450 …ounts demand instruction fetches and L1 instruction cache prefetches that were supplied by the L3 … 455 …ounts demand instruction fetches and L1 instruction cache prefetches that were supplied by the L3 … 461 …ounts demand instruction fetches and L1 instruction cache prefetches that were supplied by the L3 … 477 "BriefDescription": "Counts demand data reads that were supplied by the L3 cache.", 483 …"PublicDescription": "Counts demand data reads that were supplied by the L3 cache. Available PDIST… [all …]
H A D	pipeline.json	445 …"BriefDescription": "Counts the total number of issue slots that were not consumed by the backend … 449 …were not consumed by the backend because allocation is stalled due to a mispredicted jump or a mac… 453 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba… 461 …"BriefDescription": "Counts the total number of issue slots that were not consumed by the backend … 469 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba… 477 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba… 485 …"BriefDescription": "Counts the total number of issue slots every cycle that were not consumed by … 492 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba… 500 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba… 508 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba… [all …]
/linux/tools/perf/pmu-events/arch/x86/emeraldrapids/
H A D	memory.json	177 …Counts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM.", 183 …ounts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM. A… 188 …ounts demand instruction fetches and L1 instruction cache prefetches that were not supplied by the… 194 …ounts demand instruction fetches and L1 instruction cache prefetches that were not supplied by the… 199 …ounts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM at… 205 …ounts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM at… 210 …ounts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM on… 216 …ounts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM on… 221 "BriefDescription": "Counts demand data reads that were supplied by DRAM.", 227 …"PublicDescription": "Counts demand data reads that were supplied by DRAM. Available PDIST counter… [all …]
H A D	cache.json	180 …Description": "Counts all requests that were hit or true misses in L2 cache. True-miss excludes mi… 189 …ny type with true-miss in the L2 cache. True-miss excludes L2 misses that were merged with ongoing… 207 …e. These requests may hit or miss L2 cache. True-miss exclude misses that were merged with ongoing… 278 …d requests with true-miss in the L2 cache. True-miss excludes misses that were merged with ongoing… 295 …ny type with true-miss in the L2 cache. True-miss excludes L2 misses that were merged with ongoing… 304 …Description": "Counts all requests that were hit or true misses in L2 cache. True-miss excludes mi… 461 …"BriefDescription": "Retired load instructions whose data sources were HitM responses from shared … 466 …"PublicDescription": "Counts retired load instructions whose data sources were HitM responses from… 471 …"BriefDescription": "Retired load instructions whose data sources were L3 hit and cross-core snoop… 476 …"PublicDescription": "Counts the retired load instructions whose data sources were L3 hit and cros… [all …]
/linux/tools/perf/pmu-events/arch/x86/sapphirerapids/
H A D	memory.json	177 …Counts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM.", 183 …ounts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM. A… 188 …ounts demand instruction fetches and L1 instruction cache prefetches that were not supplied by the… 194 …ounts demand instruction fetches and L1 instruction cache prefetches that were not supplied by the… 199 …ounts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM at… 205 …ounts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM at… 210 …ounts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM on… 216 …ounts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM on… 221 "BriefDescription": "Counts demand data reads that were supplied by DRAM.", 227 …"PublicDescription": "Counts demand data reads that were supplied by DRAM. Available PDIST counter… [all …]
H A D	cache.json	180 …Description": "Counts all requests that were hit or true misses in L2 cache. True-miss excludes mi… 189 …ny type with true-miss in the L2 cache. True-miss excludes L2 misses that were merged with ongoing… 207 …e. These requests may hit or miss L2 cache. True-miss exclude misses that were merged with ongoing… 278 …d requests with true-miss in the L2 cache. True-miss excludes misses that were merged with ongoing… 295 …ny type with true-miss in the L2 cache. True-miss excludes L2 misses that were merged with ongoing… 304 …Description": "Counts all requests that were hit or true misses in L2 cache. True-miss excludes mi… 461 …"BriefDescription": "Retired load instructions whose data sources were HitM responses from shared … 466 …"PublicDescription": "Counts retired load instructions whose data sources were HitM responses from… 471 …"BriefDescription": "Retired load instructions whose data sources were L3 hit and cross-core snoop… 476 …"PublicDescription": "Counts the retired load instructions whose data sources were L3 hit and cros… [all …]
/linux/tools/perf/pmu-events/arch/x86/icelakex/
H A D	memory.json	117 …Counts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM.", 127 …ounts demand instruction fetches and L1 instruction cache prefetches that were not supplied by the… 137 …ounts demand instruction fetches and L1 instruction cache prefetches that were not supplied by the… 147 …ounts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM at… 157 …ounts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM on… 167 "BriefDescription": "Counts demand data reads that were supplied by DRAM.", 177 …"BriefDescription": "Counts demand data reads that were not supplied by the local socket's L1, L2,… 187 …"BriefDescription": "Counts demand data reads that were not supplied by the local socket's L1, L2,… 197 …"BriefDescription": "Counts demand data reads that were supplied by DRAM attached to this socket, … 207 …"BriefDescription": "Counts demand data reads that were supplied by DRAM attached to another socke… [all …]
/linux/tools/perf/pmu-events/arch/x86/graniterapids/
H A D	memory.json	198 …Counts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM.", 204 …ounts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM. A… 209 …ounts demand instruction fetches and L1 instruction cache prefetches that were not supplied by the… 215 …ounts demand instruction fetches and L1 instruction cache prefetches that were not supplied by the… 220 …ounts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM at… 226 …ounts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM at… 231 "BriefDescription": "Counts demand data reads that were supplied by DRAM.", 237 …"PublicDescription": "Counts demand data reads that were supplied by DRAM. Available PDIST counter… 242 …"BriefDescription": "Counts demand data reads that were not supplied by the local socket's L1, L2,… 248 …"PublicDescription": "Counts demand data reads that were not supplied by the local socket's L1, L2… [all …]
H A D	cache.json	108 …Description": "Counts all requests that were hit or true misses in L2 cache. True-miss excludes mi… 126 …ny type with true-miss in the L2 cache. True-miss excludes L2 misses that were merged with ongoing… 144 …e. These requests may hit or miss L2 cache. True-miss exclude misses that were merged with ongoing… 215 …d requests with true-miss in the L2 cache. True-miss excludes misses that were merged with ongoing… 241 …ny type with true-miss in the L2 cache. True-miss excludes L2 misses that were merged with ongoing… 250 …Description": "Counts all requests that were hit or true misses in L2 cache. True-miss excludes mi… 442 …"BriefDescription": "Retired load instructions whose data sources were HitM responses from shared … 447 …"PublicDescription": "Counts retired load instructions whose data sources were HitM responses from… 455 …"BriefDescription": "Retired load instructions whose data sources were L3 hit and cross-core snoop… 460 …"PublicDescription": "Counts the retired load instructions whose data sources were L3 hit and cros… [all …]
/linux/tools/perf/pmu-events/arch/x86/lunarlake/
H A D	memory.json	318 …Counts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM.", 324 …ounts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM. A… 330 …ction fetches and L1 instruction cache prefetches that were not supplied by the L3 cache and were … 336 …ction fetches and L1 instruction cache prefetches that were not supplied by the L3 cache and were … 342 "BriefDescription": "Counts demand data reads that were supplied by DRAM.", 348 …"PublicDescription": "Counts demand data reads that were supplied by DRAM. Available PDIST counter… 354 "BriefDescription": "Counts demand data reads that were supplied by DRAM.", 360 …"PublicDescription": "Counts demand data reads that were supplied by DRAM. Available PDIST counter… 366 …"BriefDescription": "Counts demand data reads that were not supplied by the L3 cache and were supp… 372 …"PublicDescription": "Counts demand data reads that were not supplied by the L3 cache and were sup… [all …]
/linux/tools/perf/pmu-events/arch/x86/alderlake/
H A D	memory.json	257 …Counts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM.", 263 …ounts demand instruction fetches and L1 instruction cache prefetches that were supplied by DRAM. A… 269 …ounts demand instruction fetches and L1 instruction cache prefetches that were not supplied by the… 275 …ounts demand instruction fetches and L1 instruction cache prefetches that were not supplied by the… 281 "BriefDescription": "Counts demand data reads that were supplied by DRAM.", 287 …"PublicDescription": "Counts demand data reads that were supplied by DRAM. Available PDIST counter… 293 "BriefDescription": "Counts demand data reads that were supplied by DRAM.", 299 …"PublicDescription": "Counts demand data reads that were supplied by DRAM. Available PDIST counter… 305 "BriefDescription": "Counts demand data reads that were not supplied by the L3 cache.", 311 …"PublicDescription": "Counts demand data reads that were not supplied by the L3 cache. Available P… [all …]
/linux/Documentation/userspace-api/media/v4l/
H A D	hist-v4l2.rst	29 aliases ``O_NONCAP`` and ``O_NOIO`` were defined. Applications can set 40 struct ``video_standard`` and the color subcarrier fields were 59 module. The ``YUV422`` and ``YUV411`` planar image formats were added. 62 output devices were added. 110 Version 0.20 introduced a number of changes which were *not backward 115 1. Some typos in ``V4L2_FMT_FLAG`` symbols were fixed. struct v4l2_clip 137 4. All the different get- and set-format commands were swept into one 152 ``VIDIOC_S_PARM`` ioctls were merged with ``VIDIOC_G_OUTPARM`` and 159 6. Control enumeration was simplified, and two new control flags were 188 cause errors if it were being used for timestamping a multimedia [all …]
/linux/tools/perf/pmu-events/arch/x86/sierraforest/
H A D	pipeline.json	321 …"BriefDescription": "Counts the number of issue slots that were not consumed by the backend becaus… 325 …were not consumed by the backend because allocation is stalled due to a mispredicted jump or a mac… 329 …"BriefDescription": "Counts the number of issue slots that were not consumed by the backend becaus… 333 …were not consumed by the backend because allocation is stalled due to a mispredicted jump or a mac… 337 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba… 345 …"BriefDescription": "Counts the total number of issue slots that were not consumed by the backend … 353 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba… 361 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba… 376 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba… 391 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba… [all …]
H A D	frontend.json	12 …"BriefDescription": "Counts the number of instructions retired that were tagged with having preced… 35 …"BriefDescription": "Counts the number of instructions retired that were tagged following an ms fl… 39 …"PublicDescription": "Counts the number of instructions retired that were tagged following an ms … 44 …"BriefDescription": "Counts the number of instructions retired that were tagged every cycle the de… 52 …tion": "Counts the number of instructions retired that were tagged because empty issue slots were … 60 …tion": "Counts the number of instructions retired that were tagged because empty issue slots were …
/linux/tools/perf/pmu-events/arch/x86/grandridge/
H A D	pipeline.json	313 …"BriefDescription": "Counts the number of issue slots that were not consumed by the backend becaus… 317 …were not consumed by the backend because allocation is stalled due to a mispredicted jump or a mac… 321 …"BriefDescription": "Counts the number of issue slots that were not consumed by the backend becaus… 325 …were not consumed by the backend because allocation is stalled due to a mispredicted jump or a mac… 329 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba… 337 …"BriefDescription": "Counts the total number of issue slots that were not consumed by the backend … 345 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba… 353 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba… 368 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba… 383 …"BriefDescription": "Counts the number of issue slots every cycle that were not consumed by the ba… [all …]
/linux/tools/perf/pmu-events/arch/x86/arrowlake/
H A D	frontend.json	56 …Uop-cache that holds translations of previously fetched instructions that were decoded by the lega… 62 …"BriefDescription": "Counts the number of instructions retired that were tagged with having preced… 70 …"BriefDescription": "Counts the number of instructions retired that were tagged with having preced… 138 …"BriefDescription": "Counts the number of instructions retired that were tagged following an ms fl… 142 …"PublicDescription": "Counts the number of instructions retired that were tagged following an ms … 148 …"BriefDescription": "Counts the number of instructions retired that were tagged following an ms fl… 152 …"PublicDescription": "Counts the number of instructions retired that were tagged following an ms … 158 …"BriefDescription": "Counts the number of instructions retired that were tagged every cycle the de… 167 …"BriefDescription": "Counts the number of instructions retired that were tagged every cycle the de… 182 …am buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to the back… [all …]
/linux/Documentation/networking/device_drivers/ethernet/altera/
H A D	altera_tse.rst	14 driver were built for a Cyclone(R) V SOC FPGA board, a Cyclone(R) V FPGA board, 26 Quartus toolchain. Quartus 13.1 and 14.0 were used to build the design that 201 statistic is a count of the number of packets received that were not addressed 205 statistic is a count of the number of packets received that were addressed to 209 statistic is a count of the number of packets received that were addressed to 218 statistic counts the number of packets transmitted that were not addressed to 222 statistic counts the number of packets transmitted that were addressed to a 226 statistic counts the number of packets transmitted that were addressed to a 250 This statistic counts the total number of packets received that were 64 octets 254 2819. This statistic counts the total number of packets received that were [all …]

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