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/linux/drivers/net/wireless/intel/iwlwifi/mvm/
H A Dsf.c100 int i, j, watermark; in iwl_mvm_fill_sf_command() local
106 sf_cmd->watermark[SF_LONG_DELAY_ON] = cpu_to_le32(SF_W_MARK_SCAN); in iwl_mvm_fill_sf_command()
110 * capabilities of the AP station, and choose the watermark accordingly. in iwl_mvm_fill_sf_command()
133 watermark = SF_W_MARK_SISO; in iwl_mvm_fill_sf_command()
136 watermark = SF_W_MARK_MIMO2; in iwl_mvm_fill_sf_command()
139 watermark = SF_W_MARK_MIMO3; in iwl_mvm_fill_sf_command()
143 watermark = SF_W_MARK_LEGACY; in iwl_mvm_fill_sf_command()
145 /* default watermark value for unassociated mode. */ in iwl_mvm_fill_sf_command()
147 watermark = SF_W_MARK_MIMO2; in iwl_mvm_fill_sf_command()
149 sf_cmd->watermark[SF_FULL_ON] = cpu_to_le32(watermark); in iwl_mvm_fill_sf_command()
/linux/Documentation/devicetree/bindings/mmc/
H A Dsynopsys-dw-mshc-common.yaml51 fifo-watermark-aligned:
54 watermark in PIO mode. But fifo watermark is requested to be aligned
56 data done irq. Add this watermark quirk to mark this requirement and
57 force fifo watermark setting accordingly.
/linux/kernel/events/
H A Dring_buffer.c238 if (unlikely(head - local_read(&rb->wakeup) > rb->watermark)) in __perf_output_begin()
239 local_add(rb->watermark, &rb->wakeup); in __perf_output_begin()
315 ring_buffer_init(struct perf_buffer *rb, long watermark, int flags) in ring_buffer_init() argument
319 if (watermark) in ring_buffer_init()
320 rb->watermark = min(max_size, watermark); in ring_buffer_init()
322 if (!rb->watermark) in ring_buffer_init()
323 rb->watermark = max_size / 2; in ring_buffer_init()
678 pgoff_t pgoff, int nr_pages, long watermark, int flags) in rb_alloc_aux() argument
700 * Watermark defaults to half the buffer, to aid PMU drivers in rb_alloc_aux()
703 if (!watermark) in rb_alloc_aux()
[all …]
H A Dinternal.h32 long watermark; /* wakeup watermark */ member
82 rb_alloc(int nr_pages, long watermark, int cpu, int flags);
85 pgoff_t pgoff, int nr_pages, long watermark, int flags);
/linux/arch/arm/mach-alpine/
H A Dalpine_cpu_pm.c47 uint32_t watermark; in alpine_cpu_pm_init() local
57 watermark = readl(&al_cpu_resume_regs->watermark); in alpine_cpu_pm_init()
58 wakeup_supported = (watermark & AL_CPU_RESUME_MAGIC_NUM_MASK) in alpine_cpu_pm_init()
H A Dalpine_cpu_resume.h19 /* Watermark for validating the CPU resume struct */
20 uint32_t watermark; member
/linux/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddml2_utils.c375 void dml2_extract_watermark_set(struct dcn_watermarks *watermark, struct display_mode_lib_st *dml_c… in dml2_extract_watermark_set() argument
377 watermark->urgent_ns = dml_get_wm_urgent(dml_core_ctx) * 1000; in dml2_extract_watermark_set()
378 …watermark->cstate_pstate.cstate_enter_plus_exit_ns = dml_get_wm_stutter_enter_exit(dml_core_ctx) *… in dml2_extract_watermark_set()
379 watermark->cstate_pstate.cstate_exit_ns = dml_get_wm_stutter_exit(dml_core_ctx) * 1000; in dml2_extract_watermark_set()
380 watermark->cstate_pstate.pstate_change_ns = dml_get_wm_dram_clock_change(dml_core_ctx) * 1000; in dml2_extract_watermark_set()
381 watermark->pte_meta_urgent_ns = dml_get_wm_memory_trip(dml_core_ctx) * 1000; in dml2_extract_watermark_set()
382 watermark->frac_urg_bw_nom = dml_get_fraction_of_urgent_bandwidth(dml_core_ctx) * 1000; in dml2_extract_watermark_set()
383 watermark->frac_urg_bw_flip = dml_get_fraction_of_urgent_bandwidth_imm_flip(dml_core_ctx) * 1000; in dml2_extract_watermark_set()
384 watermark->urgent_latency_ns = dml_get_urgent_latency(dml_core_ctx) * 1000; in dml2_extract_watermark_set()
385 watermark->cstate_pstate.fclk_pstate_change_ns = dml_get_wm_fclk_change(dml_core_ctx) * 1000; in dml2_extract_watermark_set()
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/linux/drivers/iio/imu/inv_icm42600/
H A Dinv_icm42600_buffer.h23 * @watermark: watermark configuration values for accel and gyro.
37 } watermark; member
/linux/drivers/gpu/drm/amd/display/dc/dce110/
H A Ddce110_mem_input_v.c664 /*Write mask to enable reading/writing of watermark set A*/ in program_urgency_watermark()
687 /*Write mask to enable reading/writing of watermark set B*/ in program_urgency_watermark()
746 /*Write mask to enable reading/writing of watermark set A*/ in program_stutter_watermark()
774 /*Write watermark set A*/ in program_stutter_watermark()
781 /*Write mask to enable reading/writing of watermark set B*/ in program_stutter_watermark()
790 /*Write watermark set B*/ in program_stutter_watermark()
826 /* Write mask to enable reading/writing of watermark set A */ in program_nbp_watermark()
856 /* Write watermark set A */ in program_nbp_watermark()
865 /* Write mask to enable reading/writing of watermark set B */ in program_nbp_watermark()
892 /* Write watermark set B */ in program_nbp_watermark()
/linux/kernel/cgroup/
H A Dmisc.c117 old = atomic64_read(&res->watermark); in misc_cg_update_watermark()
120 if (atomic64_cmpxchg(&res->watermark, old, new_usage) == old) in misc_cg_update_watermark()
331 u64 watermark; in misc_cg_peak_show() local
335 watermark = atomic64_read(&cg->res[i].watermark); in misc_cg_peak_show()
336 if (READ_ONCE(misc_res_capacity[i]) || watermark) in misc_cg_peak_show()
337 seq_printf(sf, "%s %llu\n", misc_res_name[i], watermark); in misc_cg_peak_show()
H A Dpids.c58 int64_t watermark; member
100 * the watermark, and this lets us avoid extra atomic overhead. in pids_update_watermark()
102 if (nr_pids > READ_ONCE(p->watermark)) in pids_update_watermark()
103 WRITE_ONCE(p->watermark, nr_pids); in pids_update_watermark()
185 * the hierarchy, but that's tolerable for the watermark. in pids_try_charge()
358 return READ_ONCE(pids->watermark); in pids_peak_read()
/linux/drivers/net/ethernet/mscc/
H A Docelot_devlink.c23 * PRIO_SHR: sharing watermark per QoS class across all ports
25 * COL_SHR: sharing watermark per color (drop precedence) across all ports
248 * reservations and rely only on the sharing watermark for frames with drop
285 * sharing watermark for drop priority 0. So frames with drop priority set to 1
346 /* Calculate all reservations, then set up the sharing watermark for DP=0 to
490 /* Watermark encode
559 * COL_SHR(dp=0) sharing watermark.
631 /* This configures the P_RSRV per-port reserved resource watermark */
711 /* This configures the Q_RSRV per-port-tc reserved resource watermark */
772 /* The watermark occupancy registers are cleared upon read,
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/linux/include/linux/amba/
H A Dpl022.h107 * enum ssp_rx_level_trig - receive FIFO watermark level which triggers
119 * Transmit FIFO watermark level which triggers (IT Interrupt fires
256 * @rx_lev_trig: Rx FIFO watermark level (for IT & DMA mode)
257 * @tx_lev_trig: Tx FIFO watermark level (for IT & DMA mode)
/linux/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_mmhubbub.c58 * unsigned int cli_watermark[4]; //4 group urgent watermark
59 * unsigned int pstate_watermark[4]; //4 group pstate watermark
164 /* Programming dwb watermark */ in mmhubbub3_config_mcif_arb()
165 …/* Watermark to generate urgent in MCIF_WB_CLI, value is determined by MCIF_WB_CLI_WATERMARK_MASK.… in mmhubbub3_config_mcif_arb()
180 /* Programming nb pstate watermark */ in mmhubbub3_config_mcif_arb()
/linux/drivers/gpu/drm/amd/display/dc/mmhubbub/dcn32/
H A Ddcn32_mmhubbub.c58 * unsigned int cli_watermark[4]; //4 group urgent watermark
59 * unsigned int pstate_watermark[4]; //4 group pstate watermark
164 /* Programming dwb watermark */ in mmhubbub32_config_mcif_arb()
165 …/* Watermark to generate urgent in MCIF_WB_CLI, value is determined by MCIF_WB_CLI_WATERMARK_MASK.… in mmhubbub32_config_mcif_arb()
180 /* Programming nb pstate watermark */ in mmhubbub32_config_mcif_arb()
/linux/include/linux/
H A Dcompaction.h61 * Number of free order-0 pages that should be available above given watermark
98 unsigned long watermark, int highest_zoneidx);
116 unsigned long watermark, in compaction_suitable() argument
/linux/drivers/iio/
H A Dindustrialio-buffer.c172 to_wait = min_t(size_t, n / datum_size, rb->watermark); in iio_buffer_read()
286 if (iio_buffer_ready(indio_dev, rb, rb->watermark, 0)) in iio_buffer_poll()
373 if (!buffer->watermark) in iio_buffer_init()
374 buffer->watermark = 1; in iio_buffer_init()
722 if (buffer->length && buffer->length < buffer->watermark) in length_store()
723 buffer->watermark = buffer->length; in length_store()
880 unsigned int watermark; member
908 config->watermark = ~0; in iio_verify_update()
924 config->watermark = min(config->watermark, buffer->watermark); in iio_verify_update()
929 config->watermark = min(config->watermark, in iio_verify_update()
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/linux/drivers/tty/serial/
H A Dsifive.c302 * __ssp_enable_txwm() - enable transmit watermark interrupts
305 * Enable interrupt generation when the transmit FIFO watermark is reached
318 * __ssp_enable_rxwm() - enable receive watermark interrupts
321 * Enable interrupt generation when the receive FIFO watermark is reached
334 * __ssp_disable_txwm() - disable transmit watermark interrupts
337 * Disable interrupt generation when the transmit FIFO watermark is reached
350 * __ssp_disable_rxwm() - disable receive watermark interrupts
353 * Disable interrupt generation when the receive FIFO watermark is reached
609 * The TX watermark is always set to 1 by this driver, which in sifive_serial_clk_notifier()
1039 /* Enable transmits and set the watermark level to 1 */ in sifive_serial_probe()
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/linux/include/linux/input/
H A Dadxl34x.h262 * watermark:
263 * The Watermark feature can be used to reduce the interrupt load
264 * of the system. The FIFO fills up to the value stored in watermark
266 * A '0' disables the watermark feature.
269 u8 watermark; member
/linux/Documentation/devicetree/bindings/mailbox/
H A Dbrcm,bcm74110-mbox.yaml25 - description: RX doorbell and watermark interrupts
26 - description: TX doorbell and watermark interrupts
/linux/Documentation/devicetree/bindings/spi/
H A Darm,pl022-peripheral-props.yaml33 description: Rx FIFO watermark level
39 description: Tx FIFO watermark level
/linux/drivers/net/ethernet/apple/
H A Dmace.h117 #define XMTFW_8 0x00 /* xmit fifo watermark = 8 words free */
120 #define RCVFW_16 0x00 /* recv fifo watermark = 16 bytes avail */
123 #define XMTFWU 0x08 /* xmit fifo watermark update enable */
124 #define RCVFWU 0x04 /* recv fifo watermark update enable */
/linux/Documentation/ABI/obsolete/
H A Dsysfs-bus-iio138 What: /sys/bus/iio/devices/iio:deviceX/buffer/watermark
145 Poll will block until the watermark is reached.
151 buffer even if there are less samples then watermark level. This
159 /sys/bus/iio/devices/iio:deviceX/bufferY/watermark
/linux/drivers/net/ethernet/intel/ice/
H A Dice_vf_mbx.c261 * snapshot exceed the watermark value, the state machine enters
263 * Traverse: If pending message count is below watermark then iterate
265 * Detect: If pending message count exceeds watermark traverse
293 /* The watermark value should not be lesser than the threshold limit in ice_mbx_vf_state_handler()
329 * mailbox queue. Comparing this value against the watermark in ice_mbx_vf_state_handler()
/linux/arch/arm/mach-omap1/
H A Dserial.c49 * properly. Note that the TX watermark initialization may not be needed
50 * once the 8250.c watermark handling code is merged.
56 omap_serial_outp(p, UART_OMAP_SCR, 0x08); /* TX watermark */ in omap_serial_reset()

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