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/linux/Documentation/devicetree/bindings/power/supply/
H A Ddlg,da9150-fuel-gauge.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/supply/dlg,da9150-fuel-gauge.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Dialog Semiconductor DA9150 Fuel-Gauge Power Supply
10 - Sebastian Reichel <sre@kernel.org>
13 - $ref: power-supply.yaml#
17 const: dlg,da9150-fuel-gauge
19 dlg,update-interval:
21 description: Interval time (milliseconds) between battery level checks.
[all …]
/linux/drivers/power/supply/
H A Dda9150-fg.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * DA9150 Fuel-Gauge Driver
22 #include <linux/devm-helpers.h>
84 int soc; member
99 da9150_read_qif(fg->da9150, read_addr, size, buf); in da9150_fg_read_attr()
121 da9150_write_qif(fg->da9150, write_addr, size, buf); in da9150_fg_write_attr()
130 mutex_lock(&fg->io_lock); in da9150_fg_read_sync_start()
150 dev_err(fg->dev, "Failed to perform QIF read sync!\n"); in da9150_fg_read_sync_start()
159 mutex_unlock(&fg->io_lock); in da9150_fg_read_sync_end()
181 mutex_lock(&fg->io_lock); in da9150_fg_write_attr_sync()
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H A Dcharger-manager.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * during suspend-to-mem.
23 #include <linux/power/charger-manager.h>
35 { "USB-HOST", EXTCON_USB_HOST },
40 { "FAST-CHARGER", EXTCON_CHG_USB_FAST },
41 { "SLOW-CHARGER", EXTCON_CHG_USB_SLOW },
49 { "CHARGE-DOWNSTREAM", EXTCON_CHG_USB_CDP },
78 /* About in-suspend (suspend-again) monitoring */
92 * is_batt_present - See if the battery presents in place.
102 switch (cm->desc->battery_present) { in is_batt_present()
[all …]
/linux/Documentation/devicetree/bindings/mfd/
H A Dda9150.txt1 Dialog Semiconductor DA9150 Combined Charger/Fuel-Gauge MFD bindings
3 DA9150 consists of a group of sub-devices:
6 ------ -----------
7 da9150-gpadc : General Purpose ADC
8 da9150-charger : Battery Charger
9 da9150-fg : Battery Fuel-Gauge
14 - compatible : Should be "dlg,da9150"
15 - reg: Specifies the I2C slave address
16 - interrupts: IRQ line info for da9150 chip.
17 - interrupt-controller: da9150 has internal IRQs (own IRQ domain).
[all …]
/linux/drivers/irqchip/
H A Dirq-aspeed-vic.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2015 - Ben Herrenschmidt, IBM Corp.
5 * Driver for Aspeed "new" VIC as found in SoC generation 3 and later
7 * Based on irq-vic.c:
9 * Copyright (C) 1999 - 2003 ARM Limited
63 writel(0xffffffff, vic->base + AVIC_INT_ENABLE_CLR); in vic_init_hw()
64 writel(0xffffffff, vic->base + AVIC_INT_ENABLE_CLR + 4); in vic_init_hw()
67 writel(0xffffffff, vic->base + AVIC_INT_TRIGGER_CLR); in vic_init_hw()
68 writel(0xffffffff, vic->base + AVIC_INT_TRIGGER_CLR + 4); in vic_init_hw()
71 writel(0, vic->base + AVIC_INT_SELECT); in vic_init_hw()
[all …]
/linux/Documentation/ABI/testing/
H A Dsysfs-platform-mellanox-bootctl6 The Life-cycle state of the SoC, which could be one of the
12 GA Non-Secured Non-Secure chip and not able to change state
85 "[INFO|WARN|ERR|ASSERT ]<msg>". Log level 'INFO' is used by
94 the out-of-band 1Gbps Ethernet port. This MAC address is
95 provided on a board-level label.
103 This value is provided on a board-level label.
111 This value is provided on a board-level label.
119 This value is provided on a board-level label.
127 This value is provided on a board-level label.
143 This value is provided on a board-level label.
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/linux/drivers/pinctrl/intel/
H A Dpinctrl-lynxpoint.c1 // SPDX-License-Identifier: GPL-2.0
25 #include <linux/pinctrl/pinconf-generic.h>
30 #include "pinctrl-intel.h"
165 #define TRIG_SEL_BIT BIT(4) /* 0: Edge, 1: Level */
190 * LP_ACPI_OWNED[31:0] gpio ownerships for gpios 0-31 (bitmapped registers)
191 * LP_ACPI_OWNED[63:32] gpio ownerships for gpios 32-63
192 * LP_ACPI_OWNED[94:64] gpio ownerships for gpios 63-94
207 * IOxAPIC redirection map applies only for gpio 8-10, 13-14, 45-55.
221 offset -= comm->pin_base; in lp_gpio_reg()
230 return comm->regs + reg_offset + reg; in lp_gpio_reg()
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H A Dpinctrl-baytrail.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2012-2013, Intel Corporation
28 #include <linux/pinctrl/pinconf-generic.h>
30 #include "pinctrl-intel.h"
570 offset -= comm->pin_base; in byt_gpio_reg()
579 reg_offset = comm->pad_map[offset] * 16; in byt_gpio_reg()
583 return comm->pad_regs + reg_offset + reg; in byt_gpio_reg()
606 dev_warn(vg->dev, "Group %s, pin %i not muxed (can't retrieve CONF0)\n", in byt_set_group_simple_mux()
632 dev_warn(vg->dev, "Group %s, pin %i not muxed (can't retrieve CONF0)\n", in byt_set_group_mixed_mux()
648 const struct intel_function func = vg->soc->functions[func_selector]; in byt_set_mux()
[all …]
/linux/drivers/soc/bcm/brcmstb/
H A Dbiuctrl.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include <linux/soc/brcmstb/brcmstb.h>
26 /* Bitmask to enable instruction and data prefetching with a 256-bytes stride */
63 if (offset == -1 || in cbc_readl()
65 return (u32)-1; in cbc_readl()
74 if (offset == -1 || in cbc_writel()
83 [CPU_MCP_FLOW_REG] = -1,
84 [CPU_WRITEBACK_CTRL_REG] = -1,
85 [RAC_CONFIG0_REG] = -1,
86 [RAC_CONFIG1_REG] = -1,
[all …]
/linux/arch/arm/mach-omap2/
H A Domap-mpuss-lowpower.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * OMAP4430 MPUSS mainly consists of dual Cortex-A9 with per-CPU
17 * to the Cortex-A9 processor must be asserted by the external
24 * ----------------------------------------------
30 * ----------------------------------------------
33 * and first to wake-up when MPUSS low power states are excercised
48 #include <asm/hardware/cache-l2x0.h>
50 #include "soc.h"
53 #include "omap4-sar-layout.h"
60 #include "prm-regbits-44xx.h"
[all …]
H A Domap-wakeupgen.c1 // SPDX-License-Identifier: GPL-2.0-only
28 #include "omap-wakeupgen.h"
29 #include "omap-secure.h"
31 #include "soc.h"
32 #include "omap4-sar-layout.h"
138 _wakeupgen_clear(d->hwirq, irq_target_cpu[d->hwirq]); in wakeupgen_mask()
151 _wakeupgen_set(d->hwirq, irq_target_cpu[d->hwirq]); in wakeupgen_unmask()
179 if (inverted && d->hwirq != SYS_NIRQ1_EXT_SYS_IRQ_1 && in wakeupgen_irq_set_type()
180 d->hwirq != SYS_NIRQ2_EXT_SYS_IRQ_2) in wakeupgen_irq_set_type()
182 d->hwirq); in wakeupgen_irq_set_type()
[all …]
/linux/Documentation/gpu/
H A Dtodo.rst11 ----------
29 Subsystem-wide refactorings
33 ---------------------------------------------
42 Level: Intermediate
45 --------------------------------------------------
53 non-converted driver. The "Atomic mode setting design overview" series [2]_
60 .. [1] https://blog.ffwll.ch/2014/11/atomic-modeset-support-for-kms-drivers.html
66 Level: Advanced
69 ---------------------------------------------------------
75 avoid confusion - the other helpers in that file are all deprecated legacy
[all …]
/linux/drivers/gpu/drm/msm/adreno/
H A Da6xx_gmu.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2017-2019 The Linux Foundation. All rights reserved. */
11 #include <soc/qcom/cmd-db.h>
23 struct adreno_gpu *adreno_gpu = &a6xx_gpu->base; in a6xx_gmu_fault()
24 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_gmu_fault()
27 gmu->hung = true; in a6xx_gmu_fault()
30 del_timer(&gpu->hangcheck_timer); in a6xx_gmu_fault()
33 kthread_queue_work(gpu->worker, &gpu->recover_work); in a6xx_gmu_fault()
45 dev_err_ratelimited(gmu->dev, "GMU watchdog expired\n"); in a6xx_gmu_irq()
51 dev_err_ratelimited(gmu->dev, "GMU AHB bus error\n"); in a6xx_gmu_irq()
[all …]
/linux/drivers/gpu/drm/amd/pm/swsmu/smu14/
H A Dsmu_v14_0_0_ppt.c37 * DO NOT use these for err/warn/info/debug messages.
187 struct smu_table_context *smu_table = &smu->smu_table; in smu_v14_0_0_init_smc_tables()
188 struct smu_table *tables = smu_table->tables; in smu_v14_0_0_init_smc_tables()
197 smu_table->metrics_table = kzalloc(sizeof(SmuMetrics_t), GFP_KERNEL); in smu_v14_0_0_init_smc_tables()
198 if (!smu_table->metrics_table) in smu_v14_0_0_init_smc_tables()
200 smu_table->metrics_time = 0; in smu_v14_0_0_init_smc_tables()
202 …smu_table->clocks_table = kzalloc(max(sizeof(DpmClocks_t), sizeof(DpmClocks_t_v14_0_1)), GFP_KERNE… in smu_v14_0_0_init_smc_tables()
203 if (!smu_table->clocks_table) in smu_v14_0_0_init_smc_tables()
206 smu_table->watermarks_table = kzalloc(sizeof(Watermarks_t), GFP_KERNEL); in smu_v14_0_0_init_smc_tables()
207 if (!smu_table->watermarks_table) in smu_v14_0_0_init_smc_tables()
[all …]
/linux/Documentation/arch/arm/stm32/
H A Dstm32-dma-mdma-chaining.rst1 .. SPDX-License-Identifier: GPL-2.0
4 STM32 DMA-MDMA chaining
9 ------------
11 This document describes the STM32 DMA-MDMA chaining feature. But before going
37 hierarchical structure that uses STM32 DMA as first level data buffer
38 interfaces for AHB peripherals, while the STM32 MDMA acts as a second level
44 ----------
46 STM32 DMA-MDMA chaining feature relies on the strengths of STM32 DMA and
50 (when DMA data counter - DMA_SxNDTR - reaches 0), the memory pointers
56 With STM32 MDMA linked-list mode, a single request initiates the data array
[all …]
/linux/sound/soc/
H A Dsoc-dapm.c1 // SPDX-License-Identifier: GPL-2.0+
3 // soc-dapm.c -- ALSA SoC Dynamic Audio Power Management
12 // o Platform power domain - can support external components i.e. amps and
15 // o Jack insertion power event initiation - e.g. hp insertion will enable
38 #include <sound/soc.h>
43 #define DAPM_UPDATE_STAT(widget, val) widget->dapm->card->dapm_stats.val++;
68 /* dapm power sequences - make this per codec in the future */
153 if (snd_soc_card_is_instantiated(dapm->card)) in dapm_assert_locked()
186 return !list_empty(&w->dirty); in dapm_dirty_widget()
191 dapm_assert_locked(w->dapm); in dapm_mark_dirty()
[all …]
/linux/sound/soc/codecs/
H A Dwm8580.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * wm8580.c -- WM8580 and WM8581 ALSA Soc Audio driver
5 * Copyright 2008-12 Wolfson Microelectronics PLC.
14 * Currently only the primary audio interface is supported - S/PDIF and
33 #include <sound/soc.h>
116 /* AIF control 1 (registers 9h-bh) */
127 /* AIF control 2 (registers ch-eh) */
254 static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
260 (struct soc_mixer_control *)kcontrol->private_value; in wm8580_out_vu()
263 unsigned int reg = mc->reg; in wm8580_out_vu()
[all …]
H A Dwm_hubs.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm_hubs.c -- WM8993/4 common code
5 * Copyright 2009-12 Wolfson Microelectronics plc
20 #include <sound/soc.h>
27 const DECLARE_TLV_DB_SCALE(wm_hubs_spkmix_tlv, -300, 300, 0);
30 static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1650, 150, 0);
32 static const DECLARE_TLV_DB_SCALE(inmix_tlv, -1500, 300, 1);
33 static const DECLARE_TLV_DB_SCALE(earpiece_tlv, -600, 600, 0);
34 static const DECLARE_TLV_DB_SCALE(outmix_tlv, -2100, 300, 0);
35 static const DECLARE_TLV_DB_SCALE(spkmixout_tlv, -1800, 600, 1);
[all …]
H A Dwm8900.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm8900.c -- WM8900 ALSA Soc Audio driver
10 * - Tristating.
11 * - TDM.
12 * - Jack detect.
13 * - FLL source configuration, currently only MCLK is supported.
29 #include <sound/soc.h>
224 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in wm8900_hp_event()
279 WARN(1, "Invalid event %d\n", event); in wm8900_hp_event()
286 static const DECLARE_TLV_DB_SCALE(out_pga_tlv, -5700, 100, 0);
[all …]
H A Dmax98388.c1 // SPDX-License-Identifier: GPL-2.0
17 #include <sound/soc.h>
75 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in max98388_dac_event()
80 regmap_write(max98388->regmap, in max98388_dac_event()
85 regmap_write(max98388->regmap, in max98388_dac_event()
88 max98388->tdm_mode = false; in max98388_dac_event()
131 static DECLARE_TLV_DB_SCALE(max98388_digital_tlv, -6350, 50, 1);
132 static DECLARE_TLV_DB_SCALE(max98388_amp_gain_tlv, -300, 300, 0);
135 "0dBFS", "-1dBFS", "-2dBFS", "-3dBFS", "-4dBFS", "-5dBFS",
136 "-6dBFS", "-7dBFS", "-8dBFS", "-9dBFS", "-10dBFS", "-11dBFS",
[all …]
/linux/drivers/clk/
H A Dclk.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
4 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
6 * Standard functionality for the common clock API. See Documentation/driver-api/clk.rst
10 #include <linux/clk-provider.h>
11 #include <linux/clk/clk-conf.h>
116 if (!core->rpm_enabled) in clk_pm_runtime_get()
119 return pm_runtime_resume_and_get(core->dev); in clk_pm_runtime_get()
124 if (!core->rpm_enabled) in clk_pm_runtime_put()
127 pm_runtime_put_sync(core->dev); in clk_pm_runtime_put()
[all …]
/linux/drivers/soc/tegra/cbb/
H A Dtegra234-cbb.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved
24 #include <soc/tegra/fuse.h>
25 #include <soc/tegra/tegra-cbb.h>
141 if (!cbb->fabric->firewall_base || in tegra234_cbb_write_access_allowed()
142 !cbb->fabric->firewall_ctl || in tegra234_cbb_write_access_allowed()
143 !cbb->fabric->firewall_wr_ctl) { in tegra234_cbb_write_access_allowed()
144 dev_info(&pdev->dev, "SoC data missing for firewall\n"); in tegra234_cbb_write_access_allowed()
148 if ((cbb->fabric->firewall_ctl > FIREWALL_APERTURE_SZ) || in tegra234_cbb_write_access_allowed()
149 (cbb->fabric->firewall_wr_ctl > FIREWALL_APERTURE_SZ)) { in tegra234_cbb_write_access_allowed()
[all …]
/linux/drivers/spi/
H A Dspi-pxa2xx.c1 // SPDX-License-Identifier: GPL-2.0-or-later
30 #include "spi-pxa2xx.h"
80 /* LPSS offset from drv_data->ioaddr */
82 /* Register offsets from drv_data->lpss_base or -1 */
105 .reg_capabilities = -1,
115 .reg_capabilities = -1,
125 .reg_capabilities = -1,
134 .reg_general = -1,
137 .reg_capabilities = -1,
144 .reg_general = -1,
[all …]
/linux/drivers/bus/
H A Dti-sysc.c1 // SPDX-License-Identifier: GPL-2.0
3 * ti-sysc.c - Texas Instruments sysc interconnect target driver
8 * Copyright (C) 2017-2024 Texas Instruments Incorporated - https://www.ti.com/
13 * Copyright (C) 2009-2011 Nokia Corporation
14 * Copyright (C) 2011-2021 Texas Instruments Incorporated - https://www.ti.com/
35 #include <linux/platform_data/ti-sysc.h>
37 #include <dt-bindings/bus/ti-sysc.h>
75 enum sysc_soc soc; member
107 * struct sysc - TI sysc interconnect target module registers and capabilities
113 * @mdata: ti-sysc to hwmod translation data for a module
[all …]
/linux/drivers/memory/tegra/
H A Dtegra30-emc.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Based on downstream driver from NVIDIA and tegra124-emc.c
6 * Copyright (C) 2011-2014 NVIDIA Corporation
9 * Copyright (C) 2019 GRATE-DRIVER project
18 #include <linux/interconnect-provider.h>
32 #include <soc/tegra/common.h>
33 #include <soc/tegra/fuse.h>
392 /* protect shared rate-change code path */
403 writel_relaxed(EMC_TIMING_UPDATE, emc->regs + EMC_TIMING_CONTROL); in emc_seq_update_timing()
405 err = readl_relaxed_poll_timeout_atomic(emc->regs + EMC_STATUS, val, in emc_seq_update_timing()
[all …]

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