| /linux/Documentation/devicetree/bindings/power/reset/ |
| H A D | atmel,at91sam9260-shdwc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/power/reset/atmel,at91sam9260-shdwc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Claudiu Beznea <claudiu.beznea@microchip.com> 14 and VDDCORE and the wake-up detection on debounced input lines. 19 - atmel,at91sam9260-shdwc 20 - atmel,at91sam9rl-shdwc 21 - atmel,at91sam9x5-shdwc 29 atmel,wakeup-mode: [all …]
|
| /linux/drivers/rtc/ |
| H A D | rtc-brcmstb-waketimer.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright © 2014-2023 Broadcom 21 #include <linux/rtc.h> 26 struct rtc_device *rtc; member 48 static inline bool brcmstb_waketmr_is_pending(struct brcmstb_waketmr *timer) in brcmstb_waketmr_is_pending() argument 52 reg = readl_relaxed(timer->base + BRCMSTB_WKTMR_EVENT); in brcmstb_waketmr_is_pending() 56 static inline void brcmstb_waketmr_clear_alarm(struct brcmstb_waketmr *timer) in brcmstb_waketmr_clear_alarm() argument 60 if (timer->alarm_en && timer->alarm_irq) in brcmstb_waketmr_clear_alarm() 61 disable_irq(timer->alarm_irq); in brcmstb_waketmr_clear_alarm() 62 timer->alarm_en = false; in brcmstb_waketmr_clear_alarm() [all …]
|
| H A D | rtc-at91sam9.c | 1 // SPDX-License-Identifier: GPL-2.0+ 7 * Based on rtc-at91rm9200.c by Rick Bronson 20 #include <linux/rtc.h> 30 * - A "Real-time Timer" (RTT) counts up in seconds from a base time. 33 * - One of the "General Purpose Backup Registers" (GPBRs) holds the 35 * epoch (1970-Jan-1 00:00:00 UTC). Some systems also include the 38 * The RTC's value is the RTT counter plus that offset. The RTC's alarm 42 * choose from, or a "real" RTC module. All systems have multiple GPBR 43 * registers available, likewise usable for more than "RTC" support. 46 #define AT91_RTT_MR 0x00 /* Real-time Mode Register */ [all …]
|
| H A D | rtc-meson-vrtc.c | 1 // SPDX-License-Identifier: GPL-2.0 9 #include <linux/rtc.h> 34 writel_relaxed(time, vrtc->io_alarm); in meson_vrtc_set_wakeup_time() 41 dev_dbg(dev, "%s: alarm->enabled=%d\n", __func__, alarm->enabled); in meson_vrtc_set_alarm() 42 if (alarm->enabled) in meson_vrtc_set_alarm() 43 vrtc->alarm_time = rtc_tm_to_time64(&alarm->time); in meson_vrtc_set_alarm() 45 vrtc->alarm_time = 0; in meson_vrtc_set_alarm() 54 vrtc->enabled = enabled; in meson_vrtc_alarm_irq_enable() 67 struct rtc_device *rtc; in meson_vrtc_probe() local 69 vrtc = devm_kzalloc(&pdev->dev, sizeof(*vrtc), GFP_KERNEL); in meson_vrtc_probe() [all …]
|
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 3 # RTC class/drivers configuration 19 Generic RTC class support. If you say yes here, you will 26 bool "Set system time from RTC on startup and resume" 30 the value read from a specified RTC device. This is useful to avoid 34 string "RTC used to set the system time" 38 The RTC device that will be used to (re)initialize the system 44 This clock should be battery-backed, so that it reads the correct 45 time when the system boots from a power-off state. Otherwise, your 50 sleep states. Do not specify an RTC here unless it stays powered [all …]
|
| H A D | rtc-nxp-bbnsm.c | 1 // SPDX-License-Identifier: GPL-2.0+ 14 #include <linux/rtc.h> 36 struct rtc_device *rtc; member 52 regmap_read(bbnsm->regmap, BBNSM_RTC_MS, &rtc_msb); in bbnsm_read_counter() 54 regmap_read(bbnsm->regmap, BBNSM_RTC_LS, &rtc_lsb); in bbnsm_read_counter() 57 } while (tmp != time && --timeout); in bbnsm_read_counter() 68 regmap_read(bbnsm->regmap, BBNSM_CTRL, &val); in bbnsm_rtc_read_time() 70 return -EINVAL; in bbnsm_rtc_read_time() 83 /* disable the RTC first */ in bbnsm_rtc_set_time() 84 regmap_update_bits(bbnsm->regmap, BBNSM_CTRL, RTC_EN_MSK, 0); in bbnsm_rtc_set_time() [all …]
|
| H A D | rtc-hym8563.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Haoyu HYM8563 RTC driver 8 * based on rtc-HYM8563 13 #include <linux/clk-provider.h> 16 #include <linux/rtc.h> 80 struct rtc_device *rtc; member 87 * RTC handling 101 dev_warn(&client->dev, in hym8563_rtc_read_time() 103 return -EINVAL; in hym8563_rtc_read_time() 106 tm->tm_sec = bcd2bin(buf[0] & HYM8563_SEC_MASK); in hym8563_rtc_read_time() [all …]
|
| H A D | rtc-pcf8563.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * An I2C driver for the Philips PCF8563 RTC 4 * Copyright 2005-06 Tower Technologies 7 * Maintainers: http://www.nslu2-linux.org/ 11 * https://www.nxp.com/docs/en/data-sheet/PCF8563.pdf 15 #include <linux/clk-provider.h> 21 #include <linux/rtc.h> 48 #define PCF8563_REG_TMRC 0x0E /* timer control */ 56 #define PCF8563_REG_TMR 0x0F /* timer */ 64 struct rtc_device *rtc; member [all …]
|
| /linux/arch/arm/boot/dts/microchip/ |
| H A D | at91sam9260ek.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include <dt-bindings/input/input.h> 17 stdout-path = &dbgu; 26 clock-frequency = <32768>; 30 clock-frequency = <18432000>; 36 tcb0: timer@fffa0000 { 37 timer@0 { 38 compatible = "atmel,tcb-timer"; 42 timer@2 { [all …]
|
| H A D | at91sam9261ek.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * at91sam9261ek.dts - Device Tree file for Atmel at91sam9261 reference board 5 * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com> 7 /dts-v1/; 16 stdout-path = "serial0:115200n8"; 25 clock-frequency = <32768>; 29 clock-frequency = <18432000>; 40 atmel,power-control-gpio = <&pioA 12 GPIO_ACTIVE_LOW>; 44 bits-per-pixel = <16>; 45 atmel,lcdcon-backlight; [all …]
|
| H A D | at91sam9g20ek_common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * at91sam9g20ek_common.dtsi - Device Tree file for Atmel at91sam9g20ek board 5 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> 8 #include <dt-bindings/input/input.h> 14 stdout-path = "serial0:115200n8"; 23 clock-frequency = <32768>; 27 clock-frequency = <18432000>; 50 pinctrl_board_mmc0_slot1: mmc0_slot1-board { 61 tcb0: timer@fffa0000 { 62 timer@0 { [all …]
|
| H A D | at91sam9rlek.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * at91sam9rlek.dts - Device Tree file for Atmel at91sam9rl reference board 6 * Alexandre Belloni <alexandre.belloni@free-electrons.com> 8 /dts-v1/; 17 stdout-path = "serial0:115200n8"; 26 clock-frequency = <32768>; 30 clock-frequency = <12000000>; 40 bits-per-pixel = <16>; 41 atmel,lcdcon-backlight; 44 atmel,guard-time = <1>; [all …]
|
| H A D | at91sam9263ek.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * at91sam9263ek.dts - Device Tree file for Atmel at91sam9263 reference board 5 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> 7 /dts-v1/; 16 stdout-path = "serial0:115200n8"; 25 clock-frequency = <32768>; 29 clock-frequency = <16367660>; 39 tcb0: timer@fff7c000 { 40 timer@0 { 41 compatible = "atmel,tcb-timer"; [all …]
|
| H A D | at91sam9m10g45ek.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * at91sam9m10g45ek.dts - Device Tree file for AT91SAM9M10G45-EK board 8 /dts-v1/; 10 #include <dt-bindings/pwm/pwm.h> 13 model = "Atmel AT91SAM9M10G45-EK"; 18 stdout-path = "serial0:115200n8"; 27 clock-frequency = <32768>; 31 clock-frequency = <12000000>; 41 tcb0: timer@fff7c000 { 42 timer@0 { [all …]
|
| H A D | at91-kizbox.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * at91-kizbox.dts - Device Tree file for Overkiz Kizbox board 5 * Copyright (C) 2012-2014 Boris BREZILLON <b.brezillon@overkiz.com> 6 * 2014-2015 Gaël PORTAY <g.portay@overkiz.com> 8 /dts-v1/; 10 #include <dt-bindings/pwm/pwm.h> 18 stdout-path = &dbgu; 27 clock-frequency = <18432000>; 31 gpio-keys { 32 compatible = "gpio-keys"; [all …]
|
| /linux/Documentation/devicetree/bindings/rtc/ |
| H A D | rtc-omap.txt | 4 - compatible: 5 - "ti,da830-rtc" - for RTC IP used similar to that on DA8xx SoC family. 6 - "ti,am3352-rtc" - for RTC IP used similar to that on AM335x SoC family. 7 This RTC IP has special WAKE-EN Register to enable 8 Wakeup generation for event Alarm. It can also be 11 - "ti,am4372-rtc" - for RTC IP used similar to that on AM437X SoC family. 12 - reg: Address range of rtc register set 13 - interrupts: rtc timer, alarm interrupts in order 16 - system-power-controller: whether the rtc is controlling the system power 18 - clocks: Any internal or external clocks feeding in to rtc [all …]
|
| H A D | qcom-pm8xxx-rtc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/rtc/qcom-pm8xxx-rtc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm PM8xxx PMIC RTC device 10 - Satya Priya <quic_c_skakit@quicinc.com> 15 - enum: 16 - qcom,pm8058-rtc 17 - qcom,pm8921-rtc 18 - qcom,pm8941-rtc [all …]
|
| /linux/drivers/power/reset/ |
| H A D | at91-poweroff.c | 5 * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> 28 #define AT91_SHDW_WKMODE0 GENMASK(2, 0) /* Wake-up 0 Mode Selection */ 32 #define AT91_SHDW_RTTWKEN BIT(16) /* Real Time Timer Wake-up Enable */ 33 #define AT91_SHDW_RTCWKEN BIT(17) /* Real Time Clock Wake-up Enable */ 36 #define AT91_SHDW_WAKEUP0 BIT(0) /* Wake-up 0 Status */ 37 #define AT91_SHDW_RTTWK BIT(16) /* Real-time Timer Wake-up */ 38 #define AT91_SHDW_RTCWK BIT(17) /* Real-time Clock Wake-up [SAM9RL] */ 65 /* Simple power-on, just bail out */ in at91_wakeup_status() 72 reason = "RTC"; in at91_wakeup_status() 76 dev_info(&pdev->dev, "Wake-Up source: %s\n", reason); in at91_wakeup_status() [all …]
|
| H A D | at91-sama5d2_shdwc.c | 2 * Atmel SAMA5D2-Compatible Shutdown Controller (SHDWC) driver. 8 * Evolved from driver at91-poweroff.c. 15 * - addition to status of other wake-up inputs [1 - 15] 16 * - Analog Comparator wake-up alarm 17 * - Serial RX wake-up alarm 18 * - low power debouncer 50 #define AT91_SHDW_WUIR 0x0c /* Shutdown Wake-up Inputs Register */ 58 #define SHDW_WK_PIN(reg, cfg) ((reg) & AT91_SHDW_WKUPIS((cfg)->wkup_pin_input)) 59 #define SHDW_RTCWK(reg, cfg) (((reg) >> ((cfg)->sr_rtcwk_shift)) & 0x1) 60 #define SHDW_RTTWK(reg, cfg) (((reg) >> ((cfg)->sr_rttwk_shift)) & 0x1) [all …]
|
| /linux/Documentation/power/ |
| H A D | charger-manager.rst | 7 Charger Manager provides in-kernel battery charger management that 8 requires temperature monitoring during suspend-to-RAM state 12 Charger Manager is a platform_driver with power-supply-class entries. 13 An instance of Charger Manager (a platform-device created with Charger-Manager) 26 own power-supply-class and each power-supply-class can provide 28 aggregates charger-related information from multiple sources and 29 shows combined information as a single power-supply-class. 31 * Support for in suspend-to-RAM polling (with suspend_again callback) 32 While the battery is being charged and the system is in suspend-to-RAM, 50 * Support for premature full-battery event handling [all …]
|
| /linux/kernel/time/ |
| H A D | alarmtimer.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * This interface provides a timer which is similar to hrtimers, 6 * but triggers a RTC alarm if the box is suspend. 8 * This interface is influenced by the Android RTC Alarm timer 18 #include <linux/rtc.h> 24 #include <linux/posix-timers.h> 31 #include "posix-timers.h" 37 * struct alarm_base - Alarm timer bases 61 /* rtc timer and device for setting alarm wakeups at suspend */ 67 * alarmtimer_get_rtcdev - Return selected rtcdevice [all …]
|
| /linux/arch/arm64/boot/dts/exynos/ |
| H A D | exynos850.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 13 #include <dt-bindings/clock/exynos850.h> 14 #include <dt-bindings/interrupt-controller/arm-gic.h> 15 #include <dt-bindings/soc/samsung,exynos-usi.h> 20 #address-cells = <2>; 21 #size-cells = <1>; 23 interrupt-parent = <&gic>; 34 arm-pmu { 35 compatible = "arm,cortex-a55-pmu"; 44 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>, [all …]
|
| /linux/arch/arm64/boot/dts/arm/ |
| H A D | juno-motherboard.dtsi | 4 * Copyright (c) 2013-2014 ARM Ltd 11 mb_clk24mhz: clock-24000000 { 12 compatible = "fixed-clock"; 13 #clock-cells = <0>; 14 clock-frequency = <24000000>; 15 clock-output-names = "juno_mb:clk24mhz"; 18 mb_clk25mhz: clock-25000000 { 19 compatible = "fixed-clock"; 20 #clock-cells = <0>; 21 clock-frequency = <25000000>; [all …]
|
| /linux/arch/arm/boot/dts/renesas/ |
| H A D | r9a06g032.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/r9a06g032-sysctrl.h> 14 #address-cells = <1>; 15 #size-cells = <1>; 18 #address-cells = <1>; 19 #size-cells = <0>; 23 compatible = "arm,cortex-a7"; 30 compatible = "arm,cortex-a7"; 33 enable-method = "renesas,r9a06g032-smp"; [all …]
|
| /linux/arch/arm/boot/dts/cirrus/ |
| H A D | ep93xx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/leds/common.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/clock/cirrus,ep9301-syscon.h> 11 compatible = "simple-bus"; 13 #address-cells = <1>; 14 #size-cells = <1>; 17 compatible = "cirrus,ep9301-syscon", "syscon"; 20 #clock-cells = <1>; [all …]
|