1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-ufs-phy.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm QMP PHY controller (UFS, SC8280XP) 8 9maintainers: 10 - Vinod Koul <vkoul@kernel.org> 11 12description: 13 The QMP PHY controller supports physical layer functionality for a number of 14 controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB. 15 16properties: 17 compatible: 18 oneOf: 19 - items: 20 - enum: 21 - qcom,qcs615-qmp-ufs-phy 22 - const: qcom,sm6115-qmp-ufs-phy 23 - items: 24 - enum: 25 - qcom,qcs8300-qmp-ufs-phy 26 - const: qcom,sa8775p-qmp-ufs-phy 27 - items: 28 - enum: 29 - qcom,kaanapali-qmp-ufs-phy 30 - const: qcom,sm8750-qmp-ufs-phy 31 - enum: 32 - qcom,msm8996-qmp-ufs-phy 33 - qcom,msm8998-qmp-ufs-phy 34 - qcom,sa8775p-qmp-ufs-phy 35 - qcom,sc7180-qmp-ufs-phy 36 - qcom,sc7280-qmp-ufs-phy 37 - qcom,sc8180x-qmp-ufs-phy 38 - qcom,sc8280xp-qmp-ufs-phy 39 - qcom,sdm845-qmp-ufs-phy 40 - qcom,sm6115-qmp-ufs-phy 41 - qcom,sm6125-qmp-ufs-phy 42 - qcom,sm6350-qmp-ufs-phy 43 - qcom,sm7150-qmp-ufs-phy 44 - qcom,sm8150-qmp-ufs-phy 45 - qcom,sm8250-qmp-ufs-phy 46 - qcom,sm8350-qmp-ufs-phy 47 - qcom,sm8450-qmp-ufs-phy 48 - qcom,sm8475-qmp-ufs-phy 49 - qcom,sm8550-qmp-ufs-phy 50 - qcom,sm8650-qmp-ufs-phy 51 - qcom,sm8750-qmp-ufs-phy 52 53 reg: 54 maxItems: 1 55 56 clocks: 57 minItems: 2 58 maxItems: 3 59 60 clock-names: 61 minItems: 2 62 maxItems: 3 63 64 power-domains: 65 maxItems: 1 66 67 resets: 68 maxItems: 1 69 70 reset-names: 71 items: 72 - const: ufsphy 73 74 vdda-phy-supply: true 75 76 vdda-pll-supply: true 77 78 "#clock-cells": 79 const: 1 80 81 "#phy-cells": 82 const: 0 83 84required: 85 - compatible 86 - reg 87 - clocks 88 - clock-names 89 - resets 90 - reset-names 91 - vdda-phy-supply 92 - vdda-pll-supply 93 - "#phy-cells" 94 95allOf: 96 - if: 97 properties: 98 compatible: 99 contains: 100 enum: 101 - qcom,msm8998-qmp-ufs-phy 102 - qcom,sa8775p-qmp-ufs-phy 103 - qcom,sc7180-qmp-ufs-phy 104 - qcom,sc7280-qmp-ufs-phy 105 - qcom,sc8180x-qmp-ufs-phy 106 - qcom,sc8280xp-qmp-ufs-phy 107 - qcom,sdm845-qmp-ufs-phy 108 - qcom,sm6115-qmp-ufs-phy 109 - qcom,sm6125-qmp-ufs-phy 110 - qcom,sm6350-qmp-ufs-phy 111 - qcom,sm7150-qmp-ufs-phy 112 - qcom,sm8150-qmp-ufs-phy 113 - qcom,sm8250-qmp-ufs-phy 114 - qcom,sm8350-qmp-ufs-phy 115 - qcom,sm8450-qmp-ufs-phy 116 - qcom,sm8475-qmp-ufs-phy 117 - qcom,sm8550-qmp-ufs-phy 118 - qcom,sm8650-qmp-ufs-phy 119 - qcom,sm8750-qmp-ufs-phy 120 then: 121 properties: 122 clocks: 123 minItems: 3 124 maxItems: 3 125 clock-names: 126 items: 127 - const: ref 128 - const: ref_aux 129 - const: qref 130 131 - if: 132 properties: 133 compatible: 134 contains: 135 enum: 136 - qcom,msm8996-qmp-ufs-phy 137 then: 138 properties: 139 clocks: 140 minItems: 2 141 maxItems: 2 142 clock-names: 143 items: 144 - const: ref 145 - const: qref 146 147 - if: 148 properties: 149 compatible: 150 contains: 151 enum: 152 - qcom,msm8996-qmp-ufs-phy 153 - qcom,msm8998-qmp-ufs-phy 154 then: 155 properties: 156 power-domains: 157 false 158 else: 159 required: 160 - power-domains 161 162additionalProperties: false 163 164examples: 165 - | 166 #include <dt-bindings/clock/qcom,gcc-sc8280xp.h> 167 #include <dt-bindings/clock/qcom,rpmh.h> 168 169 ufs_mem_phy: phy@1d87000 { 170 compatible = "qcom,sc8280xp-qmp-ufs-phy"; 171 reg = <0x01d87000 0x1000>; 172 173 clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_UFS_PHY_PHY_AUX_CLK>, 174 <&gcc GCC_UFS_REF_CLKREF_CLK>; 175 176 clock-names = "ref", "ref_aux", "qref"; 177 178 power-domains = <&gcc UFS_PHY_GDSC>; 179 180 resets = <&ufs_mem_hc 0>; 181 reset-names = "ufsphy"; 182 183 vdda-phy-supply = <&vreg_l6b>; 184 vdda-pll-supply = <&vreg_l3b>; 185 186 #phy-cells = <0>; 187 }; 188