1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/iio/adc/aspeed,ast2600-adc.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: ADC that forms part of an ASPEED server management processor. 8 9maintainers: 10 - Billy Tsai <billy_tsai@aspeedtech.com> 11 12description: | 13 • 10-bits resolution for 16 voltage channels. 14 • The device split into two individual engine and each contains 8 voltage 15 channels. 16 • Channel scanning can be non-continuous. 17 • Programmable ADC clock frequency. 18 • Programmable upper and lower threshold for each channels. 19 • Interrupt when larger or less than threshold for each channels. 20 • Support hysteresis for each channels. 21 • Built-in a compensating method. 22 • Built-in a register to trim internal reference voltage. 23 • Internal or External reference voltage. 24 • Support 2 Internal reference voltage 1.2v or 2.5v. 25 • Integrate dividing circuit for battery sensing. 26 27properties: 28 compatible: 29 enum: 30 - aspeed,ast2600-adc0 31 - aspeed,ast2600-adc1 32 - aspeed,ast2700-adc0 33 - aspeed,ast2700-adc1 34 description: 35 Their trimming data, which is used to calibrate internal reference volage, 36 locates in different address of OTP. 37 38 reg: 39 maxItems: 1 40 41 clocks: 42 maxItems: 1 43 description: 44 Input clock used to derive the sample clock. Expected to be the 45 SoC's APB clock. 46 47 resets: 48 maxItems: 1 49 50 "#io-channel-cells": 51 const: 1 52 53 vref-supply: 54 description: 55 The external regulator supply ADC reference voltage. 56 57 aspeed,int-vref-microvolt: 58 enum: [1200000, 2500000] 59 description: 60 ADC internal reference voltage in microvolts. 61 62 aspeed,battery-sensing: 63 type: boolean 64 description: 65 Inform the driver that last channel will be used to sensor battery. 66 67required: 68 - compatible 69 - reg 70 - clocks 71 - resets 72 - "#io-channel-cells" 73 74additionalProperties: false 75 76examples: 77 - | 78 #include <dt-bindings/clock/ast2600-clock.h> 79 adc0: adc@1e6e9000 { 80 compatible = "aspeed,ast2600-adc0"; 81 reg = <0x1e6e9000 0x100>; 82 clocks = <&syscon ASPEED_CLK_APB2>; 83 resets = <&syscon ASPEED_RESET_ADC>; 84 #io-channel-cells = <1>; 85 aspeed,int-vref-microvolt = <2500000>; 86 }; 87 adc1: adc@1e6e9100 { 88 compatible = "aspeed,ast2600-adc1"; 89 reg = <0x1e6e9100 0x100>; 90 clocks = <&syscon ASPEED_CLK_APB2>; 91 resets = <&syscon ASPEED_RESET_ADC>; 92 #io-channel-cells = <1>; 93 aspeed,int-vref-microvolt = <2500000>; 94 }; 95... 96