Searched +full:versal +full:- +full:ddrmc (Results 1 – 3 of 3) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/memory-controllers/xlnx,versal-ddrmc-edac.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Xilinx Versal DDRMC (Integrated DDR Memory Controller)10 - Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>11 - Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>15 4X memory interfaces. Versal DDR memory controller has an optional ECC support20 const: xlnx,versal-ddrmc24 - description: DDR Memory Controller registers[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Xilinx Versal memory controller driver15 #include <linux/firmware/xlnx-zynqmp.h>16 #include <linux/firmware/xlnx-event-manager.h>133 * https://docs.xilinx.com/r/en-US/am012-versal-register-reference/PCSR_LOCK-XRAM_SLCR-Register149 * struct ecc_error_info - ECC error log information.195 * struct ecc_status - ECC status information to report.209 * struct edac_priv - DDR memory controller private instance data.211 * @ddrmc_noc_baseaddr: Base address of the DDRMC NOC.255 ddrmc_base = priv->ddrmc_baseaddr; in get_ce_error_info()[all …]
5 ---------------------------------------------------21 W: *Web-page* with status/info23 B: URI for where to file *bugs*. A web-page with detailed bug28 patches to the given subsystem. This is either an in-tree file,29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst46 N: [^a-z]tegra all files whose path contains tegra64 ----------------83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)85 L: linux-scsi@vger.kernel.org88 F: drivers/scsi/3w-*[all …]