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Searched +full:versal +full:- +full:cpm5 +full:- +full:host (Results 1 – 2 of 2) sorted by relevance

/linux/Documentation/devicetree/bindings/pci/
H A Dxilinx-versal-cpm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/xilinx-versal-cpm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: CPM Host Controller device tree for Xilinx Versal SoCs
10 - Bharat Kumar Gogada <bharat.kumar.gogada@amd.com>
13 - $ref: /schemas/pci/pci-host-bridge.yaml#
18 - xlnx,versal-cpm-host-1.00
19 - xlnx,versal-cpm5-host
23 - description: CPM system level control and status registers.
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/linux/drivers/pci/controller/
H A Dpcie-xilinx-cpm.c1 // SPDX-License-Identifier: GPL-2.0+
3 * PCIe host controller driver for Xilinx Versal CPM DMA Bridge
5 * (C) Copyright 2019 - 2020, Xilinx, Inc.
21 #include "pcie-xilinx-common.h"
82 CPM5, enumerator
86 * struct xilinx_cpm_variant - CPM variant information
94 * struct xilinx_cpm_pcie - PCIe port information
121 return readl_relaxed(port->reg_base + reg); in pcie_read()
127 writel_relaxed(val, port->reg_base + reg); in pcie_write()
141 dev_dbg(port->dev, "Requester ID %lu\n", in cpm_pcie_clear_err_interrupts()
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