xref: /linux/Documentation/devicetree/bindings/iio/adc/adi,ad4030.yaml (revision cb4eb6771c0f8fd1c52a8f6fdec7762fb087380a) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright 2024 Analog Devices Inc.
3# Copyright 2024 BayLibre, SAS.
4%YAML 1.2
5---
6$id: http://devicetree.org/schemas/iio/adc/adi,ad4030.yaml#
7$schema: http://devicetree.org/meta-schemas/core.yaml#
8
9title: Analog Devices AD4030 and AD4630 ADC families
10
11maintainers:
12  - Michael Hennerich <michael.hennerich@analog.com>
13  - Nuno Sa <nuno.sa@analog.com>
14
15description: |
16  Analog Devices AD4030 single channel and AD4630/AD4632 dual channel precision
17  SAR ADC families
18
19  * https://www.analog.com/media/en/technical-documentation/data-sheets/ad4030-24-4032-24.pdf
20  * https://www.analog.com/media/en/technical-documentation/data-sheets/ad4630-24_ad4632-24.pdf
21  * https://www.analog.com/media/en/technical-documentation/data-sheets/ad4630-16-4632-16.pdf
22  * https://www.analog.com/media/en/technical-documentation/data-sheets/adaq4216.pdf
23  * https://www.analog.com/media/en/technical-documentation/data-sheets/adaq4224.pdf
24
25$ref: /schemas/spi/spi-peripheral-props.yaml#
26
27properties:
28  compatible:
29    enum:
30      - adi,ad4030-24
31      - adi,ad4032-24
32      - adi,ad4630-16
33      - adi,ad4630-24
34      - adi,ad4632-16
35      - adi,ad4632-24
36      - adi,adaq4216
37      - adi,adaq4224
38
39  reg:
40    maxItems: 1
41
42  spi-max-frequency:
43    maximum: 102040816
44
45  spi-rx-bus-width:
46    maxItems: 2
47    # all lanes must have the same width
48    oneOf:
49      - contains:
50          const: 1
51      - contains:
52          const: 2
53      - contains:
54          const: 4
55
56  vdd-5v-supply: true
57  vdd-1v8-supply: true
58  vio-supply: true
59
60  ref-supply:
61    description:
62      Optional External unbuffered reference. Used when refin-supply is not
63      connected.
64
65  refin-supply:
66    description:
67      Internal buffered Reference. Used when ref-supply is not connected.
68
69  vddh-supply:
70    description:
71      PGIA Positive Power Supply.
72
73  vdd-fda-supply:
74    description:
75      FDA Positive Power Supply.
76
77  cnv-gpios:
78    description:
79      The Convert Input (CNV). It initiates the sampling conversions.
80    maxItems: 1
81
82  reset-gpios:
83    description:
84      The Reset Input (/RST). Used for asynchronous device reset.
85    maxItems: 1
86
87  pga-gpios:
88    description:
89      A0 and A1 pins for gain selection. For devices that have PGA configuration
90      input pins, pga-gpios should be defined.
91    minItems: 2
92    maxItems: 2
93
94  pwms:
95    description: PWM signal connected to the CNV pin.
96    maxItems: 1
97
98  interrupts:
99    description:
100      The BUSY pin is used to signal that the conversions results are available
101      to be transferred when in SPI Clocking Mode. This nodes should be
102      connected to an interrupt that is triggered when the BUSY line goes low.
103    maxItems: 1
104
105  interrupt-names:
106    const: busy
107
108required:
109  - compatible
110  - reg
111  - vdd-5v-supply
112  - vdd-1v8-supply
113  - vio-supply
114  - cnv-gpios
115
116oneOf:
117  - required:
118      - ref-supply
119  - required:
120      - refin-supply
121
122unevaluatedProperties: false
123
124allOf:
125  - if:
126      properties:
127        compatible:
128          enum:
129            - adi,ad4030-24
130            - adi,ad4032-24
131    then:
132      properties:
133        spi-rx-bus-width:
134          maxItems: 1
135  # ADAQ devices require a gain property to indicate how hardware PGA is set
136  - if:
137      properties:
138        compatible:
139          contains:
140            pattern: ^adi,adaq
141    then:
142      required:
143        - vddh-supply
144        - vdd-fda-supply
145        - pga-gpios
146      properties:
147        ref-supply: false
148    else:
149      properties:
150        pga-gpios: false
151
152examples:
153  - |
154    #include <dt-bindings/gpio/gpio.h>
155
156    spi {
157        #address-cells = <1>;
158        #size-cells = <0>;
159
160        adc@0 {
161            compatible = "adi,ad4030-24";
162            reg = <0>;
163            spi-max-frequency = <80000000>;
164            vdd-5v-supply = <&supply_5V>;
165            vdd-1v8-supply = <&supply_1_8V>;
166            vio-supply = <&supply_1_8V>;
167            ref-supply = <&supply_5V>;
168            cnv-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
169            reset-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
170        };
171    };
172  - |
173    #include <dt-bindings/gpio/gpio.h>
174
175    spi {
176        #address-cells = <1>;
177        #size-cells = <0>;
178
179        adc@0 {
180            compatible = "adi,ad4630-24";
181            reg = <0>;
182            spi-max-frequency = <80000000>;
183            spi-rx-bus-width = <4>, <4>;
184            vdd-5v-supply = <&supply_5V>;
185            vdd-1v8-supply = <&supply_1_8V>;
186            vio-supply = <&supply_1_8V>;
187            ref-supply = <&supply_5V>;
188            cnv-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
189            reset-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
190        };
191    };
192  - |
193    #include <dt-bindings/gpio/gpio.h>
194
195    spi {
196        #address-cells = <1>;
197        #size-cells = <0>;
198
199        adc@0 {
200            compatible = "adi,adaq4216";
201            reg = <0>;
202            spi-max-frequency = <80000000>;
203            vdd-5v-supply = <&supply_5V>;
204            vdd-1v8-supply = <&supply_1_8V>;
205            vio-supply = <&supply_1_8V>;
206            refin-supply = <&refin_sup>;
207            vddh-supply = <&vddh>;
208            vdd-fda-supply = <&vdd_fda>;
209            cnv-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
210            reset-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
211            pga-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>,
212                        <&gpio0 3 GPIO_ACTIVE_HIGH>;
213        };
214    };
215