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/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dqcom,wsa8840.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
11 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
18 - $ref: dai-common.yaml#
25 maxItems: 1
27 powerdown-gpios:
29 maxItems: 1
31 reset-gpios:
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dx1e80100-lenovo-yoga-slim7x.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include "x1e80100-pmics.dtsi"
16 compatible = "lenovo,yoga-slim7x", "qcom,x1e80100";
18 pmic-glink {
19 compatible = "qcom,x1e80100-pmic-glink",
20 "qcom,sm8550-pmic-glink",
21 "qcom,pmic-glink";
[all …]
H A Dx1e80100-crd.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/gpio-keys.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
14 #include "x1e80100-pmics.dtsi"
18 compatible = "qcom,x1e80100-crd", "qcom,x1e80100";
24 wcd938x: audio-codec {
25 compatible = "qcom,wcd9385-codec";
[all …]
H A Dx1e80100-qcp.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include "x1e80100-pmics.dtsi"
16 compatible = "qcom,x1e80100-qcp", "qcom,x1e80100";
22 wcd938x: audio-codec {
23 compatible = "qcom,wcd9385-codec";
25 pinctrl-names = "default";
26 pinctrl-0 = <&wcd_default>;
[all …]
H A Dsm8650-mtp.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
21 compatible = "qcom,sm8650-mtp", "qcom,sm8650";
28 stdout-path = "serial0:115200n8";
31 pmic-glink {
32 compatible = "qcom,sm8650-pmic-glink",
33 "qcom,sm8550-pmic-glink",
34 "qcom,pmic-glink";
35 #address-cells = <1>;
[all …]
H A Dsm8550-mtp.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
22 compatible = "qcom,sm8550-mtp", "qcom,sm8550";
23 chassis-type = "handset";
29 wcd938x: audio-codec {
30 compatible = "qcom,wcd9385-codec";
32 pinctrl-names = "default";
33 pinctrl-0 = <&wcd_default>;
35 qcom,micbias1-microvolt = <1800000>;
[all …]
H A Dsm8550-qrd.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
23 compatible = "qcom,sm8550-qrd", "qcom,sm8550";
24 chassis-type = "handset";
31 wcd938x: audio-codec {
32 compatible = "qcom,wcd9385-codec";
34 pinctrl-names = "default";
35 pinctrl-0 = <&wcd_default>;
[all …]
H A Dsm8650-qrd.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
22 compatible = "qcom,sm8650-qrd", "qcom,sm8650";
30 stdout-path = "serial0:115200n8";
33 gpio-keys {
34 compatible = "gpio-keys";
36 pinctrl-0 = <&volume_up_n>;
37 pinctrl-names = "default";
[all …]
H A Dsm8550-hdk.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
22 compatible = "qcom,sm8550-hdk", "qcom,sm8550";
23 chassis-type = "embedded";
30 wcd938x: audio-codec {
31 compatible = "qcom,wcd9385-codec";
33 pinctrl-names = "default";
34 pinctrl-0 = <&wcd_default>;
[all …]
H A Dsm8650-hdk.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
21 compatible = "qcom,sm8650-hdk", "qcom,sm8650";
22 chassis-type = "embedded";
30 stdout-path = "serial0:115200n8";
33 hdmi-out {
34 compatible = "hdmi-connector";
39 remote-endpoint = <&lt9611_out>;
[all …]
H A Dsdm670-google-sargo.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device tree for Google Pixel 3a, adapted from google-blueline device tree,
4 * xiaomi-lavender device tree, and oneplus-common device tree.
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
19 /delete-node/ &mpss_region;
20 /delete-node/ &venus_mem;
[all …]
H A Dsdm845-xiaomi-beryllium.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
6 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
7 #include <dt-bindings/sound/qcom,q6afe.h>
8 #include <dt-bindings/sound/qcom,q6asm.h>
17 /delete-node/ &tz_mem;
18 /delete-node/ &adsp_mem;
19 /delete-node/ &wlan_msa_mem;
20 /delete-node/ &mpss_region;
[all …]
H A Dsdm845-xiaomi-beryllium-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include <dt-bindings/leds/common.h>
6 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
7 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
8 #include <dt-binding
[all...]
H A Dsdm845-oneplus-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include <dt-bindings/input/linux-event-codes.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include <dt-bindings/sound/qcom,q6afe.h>
14 #include <dt-bindings/sound/qcom,q6asm.h>
17 #include "sdm845-wcd9340.dtsi"
21 /delete-node/ &rmtfs_mem;
30 stdout-path = "serial0:115200n8";
[all …]
H A Dsdm845-xiaomi-polaris.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulato
[all...]
H A Dqcm6490-fairphone-fp5.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
12 #include <dt-bindings/iio/qcom,spmi-adc7-pm7325.h>
13 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
16 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
23 /delete-node/ &rmtfs_mem;
28 chassis-type = "handset";
36 #address-cells = <2>;
[all …]
H A Dsdm845-db845c.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/sound/qcom,q6afe.h>
12 #include <dt-bindings/sound/qcom,q6asm.h>
14 #include "sdm845-wcd9340.dtsi"
21 qcom,msm-id = <341 0x20001>;
22 qcom,board-id = <8 0>;
[all …]
H A Dqrb5165-rb5.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
10 #include <dt-bindings/sound/qcom,q6afe.h>
11 #include <dt-bindings/sound/qcom,q6asm.h>
12 #include <dt-bindings/usb/pd.h>
20 compatible = "qcom,qrb5165-rb5", "qcom,sm8250";
21 qcom,msm-id = <455 0x20001>;
22 qcom,board-id = <11 3>;
[all …]
H A Dsc7180-acer-aspire1.dts1 // SPDX-License-Identifier: BSD-3-Clause
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/sound/qcom,q6asm.h>
7 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
14 /delete-node/ &tz_mem;
15 /delete-node/ &ipa_fw_mem;
18 model = "Acer Aspire 1";
20 chassis-type = "laptop";
30 stdout-path = "serial0:115200n8";
[all …]
/freebsd/sys/contrib/device-tree/Bindings/ufs/
H A Dufshcd-pltfrm.txt3 UFSHC nodes are defined to describe on-chip UFS host controllers.
7 - compatible : must contain "jedec,ufs-1.1" or "jedec,ufs-2.0"
10 SoC-specific compatible along with "qcom,ufshc" and
12 "qcom,msm8994-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
13 "qcom,msm8996-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
14 "qcom,msm8998-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
15 "qcom,sdm845-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
16 "qcom,sm8150-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
17 "qcom,sm8250-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
18 "qcom,sm8350-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
[all …]
H A Dufs-common.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/ufs/ufs-commo
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/freebsd/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h2 * Copyright (c) 2017-2018 Cavium, Inc.
9 * 1. Redistributions of source code must retain the above copyright
35 …_K2_E5 (0x1<<1) // It indicates ras…
36 …GLCS_REG_INT_STS_RASDP_ERROR_K2_E5_SHIFT 1
40 …R_K2_E5 (0x1<<1) // This bit masks, …
41 …GLCS_REG_INT_MASK_RASDP_ERROR_K2_E5_SHIFT 1
45 …ROR_K2_E5 (0x1<<1) // It indicates ras…
46 …GLCS_REG_INT_STS_WR_RASDP_ERROR_K2_E5_SHIFT 1
50 …RROR_K2_E5 (0x1<<1) // It indicates ras…
51 …GLCS_REG_INT_STS_CLR_RASDP_ERROR_K2_E5_SHIFT 1
[all …]