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/linux/drivers/gpu/drm/msm/registers/adreno/
H A Da6xx.xml34 <bitfield name="CP_IPC_INTR_0" pos="4" type="boolean" variants="A7XX-"/>
35 <bitfield name="CP_IPC_INTR_1" pos="5" type="boolean" variants="A7XX-"/>
45 <bitfield name="CP_RB" pos="15" type="boolean" variants="A6XX"/>
47 <bitfield name="PM4CPINTERRUPT" pos="15" type="boolean" variants="A7XX-"/>
48 <bitfield name="PM4CPINTERRUPTLPAC" pos="16" type="boolean" variants="A7XX-"/>
52 <bitfield name="CP_CACHE_FLUSH_TS_LPAC" pos="21" type="boolean" variants="A7XX-"/>
59 <bitfield name="TSBWRITEERROR" pos="28" type="boolean" variants="A7XX-"/>
60 <bitfield name="SWFUSEVIOLATION" pos="29" type="boolean" variants="A7XX-"/>
77 <bitfield name="CP_OPCODE_ERROR_LPAC" pos="8" type="boolean" variants="A7XX-"/>
78 <bitfield name="CP_UCODE_ERROR_LPAC" pos="9" type="boolean" variants="A7XX-"/>
[all …]
H A Dadreno_pm4.xml9 <value name="VS_DEALLOC" value="0x00" variants="A2XX-A5XX"/>
10 <value name="PS_DEALLOC" value="0x01" variants="A2XX-A5XX"/>
11 <value name="VS_DONE_TS" value="0x02" variants="A2XX-A5XX"/>
12 <value name="PS_DONE_TS" value="0x03" variants="A2XX-A5XX"/>
19 <value name="CACHE_FLUSH" value="0x06" variants="A2XX-A4XX"/>
20 <value name="VIZQUERY_START" value="0x07" variants="A2XX"/>
21 <value name="HLSQ_FLUSH" value="0x07" variants="A3XX-A4XX"/>
22 <value name="VIZQUERY_END" value="0x08" variants="A2XX"/>
23 <value name="SC_WAIT_WC" value="0x09" variants="A2XX"/>
24 <value name="WRITE_PRIMITIVE_COUNTS" value="0x09" variants="A6XX-"/>
[all …]
H A Da6xx_gmu.xml70 <reg32 offset="0x1fc10" name="GMU_CX_GMU_POWER_COUNTER_ENABLE" variants="A8XX"/>
73 <reg32 offset="0x1fc40" name="GMU_CX_GMU_POWER_COUNTER_SELECT_XOCLK_0" variants="A8XX-"/>
74 <reg32 offset="0x1fc41" name="GMU_CX_GMU_POWER_COUNTER_SELECT_XOCLK_1" variants="A8XX-"/>
76 <reg32 offset="0x1fca0" name="GMU_CX_GMU_POWER_COUNTER_XOCLK_0_L" variants="A8XX-"/>
78 <reg32 offset="0x1fca1" name="GMU_CX_GMU_POWER_COUNTER_XOCLK_0_H" variants="A8XX-"/>
98 <reg32 offset="0x1f8d0" name="GMU_SPTPRAC_PWR_CLK_STATUS" variants="A6XX">
108 <reg32 offset="0x1f8d0" name="GMU_SPTPRAC_PWR_CLK_STATUS" variants="A7XX">
112 <reg32 offset="0x1f7e8" name="GMU_PWR_CLK_STATUS" variants="A8XX-">
133 <reg32 offset="0x1f8ec" name="GPU_GMU_CX_GMU_RPMH_POWER_STATE" variants="A6XX"/>
134 <reg32 offset="0x1f7e9" name="GPU_GMU_CX_GMU_RPMH_POWER_STATE" variants="A8XX-"/>
[all …]
/linux/drivers/soc/renesas/
H A DKconfig369 This enables support for the Renesas RZ/G2UL SoC variants.
376 This enables support for the Renesas RZ/G2L SoC variants.
383 This enables support for the Renesas RZ/V2L SoC variants.
391 This enables support for the Renesas RZ/G3S SoC variants.
407 This enables support for the Renesas RZ/G3E SoC variants.
414 This enables support for the Renesas RZ/V2N SoC variants.
422 This enables support for the Renesas RZ/V2H(P) SoC variants.
429 This enables support for the Renesas RZ/T2H SoC variants.
436 This enables support for the Renesas RZ/N2H SoC variants.
/linux/Documentation/scheduler/
H A Dcompletion.rst39 - the waiting part through a call to one of the variants of wait_for_completion(),
79 variants of wait_for_completion(), as it must be assured that memory de-allocation
125 To emphasise this again: in particular when using some of the waiting API variants
127 _killable() and _interruptible()) variants, the wait might complete
174 uninterruptible. wait_for_completion() and its variants are only safe
180 As all variants of wait_for_completion() can (obviously) block for a long
185 wait_for_completion*() variants available:
188 The below variants all return status and this status should be checked in
228 Further variants include _killable which uses TASK_KILLABLE as the
235 The _io variants wait_for_completion_io() behave the same as the non-_io
[all …]
/linux/scripts/atomic/
H A Datomics.tbl3 # Where meta contains a string of variants to generate.
4 # Upper-case implies _{acquire,release,relaxed} variants.
9 # * R - return: returns base type (has _return variants)
10 # * F/f - fetch: returns base type (has fetch_ variants)
/linux/drivers/gpu/drm/msm/registers/
H A Dgen_header.py469 # specifies all possible hw variants:
471 # Regs that have multiple variants.. we only generated the C++
479 self.variants = set()
535 if "variants" not in attrs:
538 variant = attrs["variants"].split(",")[0]
555 # TODO this should really handle *all* variants, including dealing
565 # All variants must be same size:
578 self.variants.add(reg.domain)
757 variants = self.variant_regs.get(reg.name)
758 if variants:
[all …]
H A Drules-fd.xsd121 <attribute name="variants" type="string" use="optional" />
141 <attribute name="variants" type="string" use="optional" />
155 <attribute name="variants" type="string" use="optional" />
176 <attribute name="variants" type="string" use="optional" />
217 <attribute name="variants" type="string" use="optional" />
248 <attribute name="variants" type="string" use="optional" />
/linux/rust/syn/
H A Dderive.rs55 pub variants: Punctuated<Variant, Token![,]>,
111 let (where_clause, brace, variants) = data_enum(input)?; in parse()
123 variants, in parse()
197 let variants = content.parse_terminated(Variant::parse, Token![,])?; in data_enum() localVariable
199 Ok((where_clause, brace, variants)) in data_enum()
251 data.variants.to_tokens(tokens); in to_tokens()
/linux/arch/arm/mach-bcm/
H A DKconfig36 which includes the following variants:
46 which includes the following variants:
110 variants.
118 BCM21663 and BCM21664 variants.
/linux/include/linux/
H A Datomic.h11 * Relaxed variants of xchg, cmpxchg and some atomic operations.
13 * We support four variants:
35 * The idea here is to build acquire/release variants by adding explicit
H A Dseqlock.h100 * Lockdep is never used in any for the raw write variants.
268 * @s: Pointer to seqcount_t or any of the seqcount_LOCKNAME_t variants
285 * @s: Pointer to seqcount_t or any of the seqcount_LOCKNAME_t variants
293 * @s: Pointer to seqcount_t or any of the seqcount_LOCKNAME_t variants
305 * @s: Pointer to seqcount_t or any of the seqcount_LOCKNAME_t variants
325 * @s: Pointer to seqcount_t or any of the seqcount_LOCKNAME_t variants
348 * @s: Pointer to seqcount_t or any of the seqcount_LOCKNAME_t variants
373 * @s: Pointer to seqcount_t or any of the seqcount_LOCKNAME_t variants
397 * @s: Pointer to seqcount_t or any of the seqcount_LOCKNAME_t variants
417 * @s: Pointer to seqcount_t or any of the seqcount_LOCKNAME_t variants
[all...]
/linux/arch/arm/mach-pxa/
H A DKconfig124 Select code specific to PXA21x/25x/26x variants
130 Select code specific to PXA27x variants
136 Select code specific to PXA3xx variants
/linux/tools/testing/selftests/bpf/prog_tests/
H A Dlibbpf_str.c18 * Test case to check that all bpf_attach_type variants are covered by
63 * Test case to check that all bpf_link_type variants are covered by
108 * Test case to check that all bpf_map_type variants are covered by
165 * Test case to check that all bpf_prog_type variants are covered by
/linux/Documentation/fb/
H A Ds3fb.rst10 S3 Trio64 (and variants V+, UV+, V2/DX, V2/GX)
11 S3 Virge (and variants VX, DX, GX and GX2+)
26 * 4 bpp pseudocolor modes (with 18bit palette, two variants)
/linux/include/crypto/
H A Dchacha.h9 * The ChaCha paper specifies 20, 12, and 8-round variants. In general, it is
11 * variants can be needed in some performance-sensitive scenarios. The generic
12 * ChaCha code currently allows only the 20 and 12-round variants.
/linux/Documentation/core-api/
H A Dtimekeeping.rst12 The recommended simplest form returns an opaque ktime_t, with variants
62 For all of the above, there are variants that return the time in a
100 Some additional variants exist for more specialized cases:
138 These variants are safe to call from any context, including from
H A Dasm-annotations.rst112 architecture specific ``__ALIGN`` bytes. There are also ``_NOALIGN`` variants
149 one. ``_NOALIGN`` variants exist too. The use is the same as for the ``FUNC``
194 * ``SYM_DATA`` and ``SYM_DATA_LOCAL`` are variants for simple, mostly one-line
211 symbol marked by them. They are used either in ``_LABEL`` variants of the
/linux/Documentation/arch/x86/
H A Dmds.rst10 on internal buffers in Intel CPUs. The variants are:
73 All variants have the same mitigation strategy at least for the single CPU
182 and not by any other MDS variant. The other MDS variants cannot be
184 the Load Ports are shared. So on CPUs affected by other variants, the
203 The mitigation is hooked into all variants of halt()/mwait(), but does
/linux/include/linux/mfd/
H A Dstmpe.h52 * For registers whose locations differ on variants, the correct address is
115 * different variants. Indexed by one of STMPE_IDX_*.
117 * @num_gpios: number of gpios, differs for variants
/linux/Documentation/devicetree/bindings/arm/
H A Darm,versatile.yaml13 The ARM Versatile boards are two variants of ARM926EJ-S evaluation boards
19 variants.
/linux/Documentation/driver-api/
H A Dvfio-pci-device-specific-driver-acceptance.rst3 Acceptance criteria for vfio-pci device specific driver variants
19 variants may interact with parent devices (ex. SR-IOV PF in support of
/linux/drivers/iio/pressure/
H A Dabp060mg.c39 /* mbar & kPa variants */
62 /* psi variants (1 psi ~ 6895 Pa) */
210 /* mbar & kPa variants (abp060m [60 mbar] == abp006k [6 kPa]) */
235 /* psi variants */
/linux/drivers/rtc/
H A Drtc-pl031.c36 /* ST variants have additional timer functionality */
51 #define RTC_BIT_PI (1 << 1) /* Periodic interrupt bit. ST variants only. */
329 /* Enable the clockwatch on ST Variants */ in pl031_probe()
337 * On ST PL031 variants, the RTC reset value does not provide correct in pl031_probe()
441 /* ST Micro variants */
/linux/Documentation/bpf/
H A Dmap_hash.rst6 BPF_MAP_TYPE_HASH, with PERCPU and LRU Variants
28 variants add LRU semantics to their respective hash tables. An LRU hash
227 ``BPF_MAP_TYPE_LRU_HASH`` and variants
254 variants. See the dot file source for kernel function name code references.

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