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/linux/Documentation/devicetree/bindings/usb/
H A Dusb-xhci.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/usb-xhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mathias Nyman <mathias.nyman@intel.com>
13 - $ref: usb-hcd.yaml#
16 usb2-lpm-disable:
17 description: Indicates if we don't want to enable USB2 HW LPM
20 usb3-lpm-capable:
21 description: Determines if platform is USB3 LPM capable
[all …]
H A Dhisilicon,histb-xhci.txt6 - compatible: should be "hisilicon,hi3798cv200-xhci"
7 - reg: specifies physical base address and size of the registers
8 - interrupts : interrupt used by the controller
9 - clocks: a list of phandle + clock-specifier pairs, one for each
10 entry in clock-names
11 - clock-names: must contain
16 - resets: a list of phandle and reset specifier pairs as listed in
17 reset-names property.
18 - reset-names: must contain
20 - phys: a list of phandle + phy specifier pairs
[all …]
H A Dmediatek,mtk-xhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: usb-xhci.yaml
19 case 2: supports dual-role mode, and the host is based on xHCI driver.
25 - enum:
26 - mediatek,mt2701-xhci
27 - mediatek,mt2712-xhci
[all …]
/linux/arch/arm64/boot/dts/ti/
H A Dk3-am62p-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "ti,am62-usb";
14 clock-names = "ref";
15 ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>;
16 #address-cells = <2>;
17 #size-cells = <2>;
18 power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
27 interrupt-names = "host", "peripheral";
28 maximum-speed = "high-speed";
[all …]
H A Dk3-am62a-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3";
25 #address-cells = <2>;
26 #size-cells = <2>;
28 #interrupt-cells = <3>;
[all …]
H A Dk3-am62-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3";
19 #address-cells = <2>;
20 #size-cells = <2>;
22 #interrupt-cells = <3>;
[all …]
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8195-evb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
11 compatible = "mediatek,mt8195-evb", "mediatek,mt8195";
18 stdout-path = "serial0:921600n8";
32 pinctrl-names = "default";
33 pinctrl-0 = <&i2c0_pin>;
34 clock-frequency = <100000>;
39 pinctrl-names = "default";
40 pinctrl-0 = <&i2c1_pin>;
41 clock-frequency = <400000>;
[all …]
H A Dmt8395-radxa-nio-12l.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/pinctrl/mt8195-pinfunc.h>
13 #include <dt-bindings/regulator/mediatek,mt6360-regulator.h>
14 #include <dt-bindings/spmi/spmi.h>
15 #include <dt-bindings/usb/pd.h>
19 chassis-type = "embedded";
20 compatible = "radxa,nio-12l", "mediatek,mt8395", "mediatek,mt8195";
36 stdout-path = "serial0:921600n8";
[all …]
H A Dmt8195-cherry.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/spmi/spmi.h>
25 backlight_lcd0: backlight-lcd0 {
26 compatible = "pwm-backlight";
27 brightness-levels = <0 1023>;
28 default-brightness-level = <576>;
29 enable-gpios = <&pio 82 GPIO_ACTIVE_HIGH>;
30 num-interpolated-steps = <1023>;
32 power-supply = <&ppvar_sys>;
[all …]
/linux/arch/arm64/boot/dts/socionext/
H A Duniphier-pxs3-ref-gadget0.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 // Device Tree Source for UniPhier PXs3 Reference Board (for USB-Device #0)
8 /dts-v1/;
9 #include "uniphier-pxs3-ref.dts"
12 model = "UniPhier PXs3 Reference Board (USB-Device #0)";
23 pinctrl-0 = <&pinctrl_usb0_device>;
27 snps,usb2-gadget-lpm-disable;
28 phy-names = "usb2-phy", "usb3-phy";
33 /delete-property/ vbus-supply;
37 /delete-property/ vbus-supply;
[all …]
H A Duniphier-pxs3-ref-gadget1.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 // Device Tree Source for UniPhier PXs3 Reference Board (for USB-Device #1)
8 /dts-v1/;
9 #include "uniphier-pxs3-ref.dts"
12 model = "UniPhier PXs3 Reference Board (USB-Device #1)";
23 pinctrl-0 = <&pinctrl_usb1_device>;
27 snps,usb2-gadget-lpm-disable;
28 phy-names = "usb2-phy", "usb3-phy";
33 /delete-property/ vbus-supply;
37 /delete-property/ vbus-supply;
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/linux/Documentation/ABI/testing/
H A Dsysfs-bus-usb10 This allows to avoid side-effects with drivers
28 drivers, non-authorized one are not. By default, wired
33 Contact: linux-usb@vger.kernel.org
67 What: /sys/bus/usb-serial/drivers/.../new_id
69 Contact: linux-usb@vger.kernel.org
72 extra bus folder "usb-serial" in sysfs; apart from that
97 If CONFIG_PM is set and a USB 2.0 lpm-capable device is plugged
98 in to a xHCI host which support link PM, it will perform a LPM
99 test; if the test is passed and host supports USB2 hardware LPM
100 (xHCI 1.0 feature), USB2 hardware LPM will be enabled for the
[all …]
/linux/Documentation/driver-api/usb/
H A Dpower-management.rst1 .. _usb-power-management:
7 :Date: Last-updated: February 2014
11 ---------
17 * Changing the default idle-delay time
31 -------------------------
35 component is ``suspended`` it is in a nonfunctional low-power state; it
37 ``resumed`` (returned to a functional full-power state) when the kernel
67 ----------------------
85 --------------------------
101 -------------------
[all …]
/linux/drivers/usb/cdns3/
H A Dcdns3-gadget.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2018-2019 Cadence.
6 * Copyright (C) 2017-2018 NXP
15 #include <linux/dma-direction.h>
18 * USBSS-DEV register interface.
23 * struct cdns3_usb_regs - device controller registers.
53 * @buf_addr: Address for On-chip Buffer operations.
54 * @buf_data: Data for On-chip Buffer operations.
55 * @buf_ctrl: On-chip Buffer Access Control.
123 /* USB_CONF - bitmasks */
[all …]
/linux/drivers/usb/dwc3/
H A Dhost.c1 // SPDX-License-Identifier: GPL-2.0
3 * host.c - DesignWare USB3 DRD Controller Host Glue
5 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com
16 #include "../host/xhci-port.h"
17 #include "../host/xhci-ext-caps.h"
18 #include "../host/xhci-caps.h"
19 #include "../host/xhci-plat.h"
26 * dwc3_power_off_all_roothub_ports - Power off all Root hub ports
39 if (dwc->xhci_resources[0].start) { in dwc3_power_off_all_roothub_ports()
40 xhci_regs = ioremap(dwc->xhci_resources[0].start, DWC3_XHCI_REGS_END); in dwc3_power_off_all_roothub_ports()
[all …]
H A Dcore.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * core.h - DesignWare USB3 DRD Core Header
5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com
20 #include <linux/dma-mapping.h>
37 * DWC3 Multiport controllers support up to 15 High-Speed PHYs
197 /* Global SoC Bus Configuration Register: AHB-prot/AXI-cache/OCP-ReqInfo */
298 /* Global USB2 PHY Configuration Register */
314 /* Global USB2 PHY Vendor Control Register */
682 * struct dwc3_event_buffer - Software event buffer representation
716 * struct dwc3_ep - device side endpoint representation
[all …]
H A Ddwc3-pci.c1 // SPDX-License-Identifier: GPL-2.0
3 * dwc3-pci.c - PCI Specific glue layer
5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com
63 #define PCI_INTEL_BXT_DSM_GUID "732b85d5-b7a7-4a1b-9ba0-4bbd00ffd511"
73 * struct dwc3_pci - Driver private structure
94 { "reset-gpios", &reset_gpios, 1 },
95 { "cs-gpios", &cs_gpios, 1 },
115 return -ENOMEM; in dwc3_byt_enable_ulpi_refclock()
153 PROPERTY_ENTRY_STRING("linux,extcon-name", "mrfld_bcove_pwrsrc"),
156 PROPERTY_ENTRY_BOOL("snps,usb2-gadget-lpm-disable"),
[all …]
H A Dcore.c1 // SPDX-License-Identifier: GPL-2.0
3 * core.c - DesignWare USB3 DRD Controller Core file
5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com
24 #include <linux/dma-mapping.h>
42 #include "../host/xhci-ext-caps.h"
47 * dwc3_get_dr_mode - Validates and sets dr_mode
53 struct device *dev = dwc->dev; in dwc3_get_dr_mode()
56 if (dwc->dr_mode == USB_DR_MODE_UNKNOWN) in dwc3_get_dr_mode()
57 dwc->dr_mode = USB_DR_MODE_OTG; in dwc3_get_dr_mode()
59 mode = dwc->dr_mode; in dwc3_get_dr_mode()
[all …]
/linux/drivers/usb/host/
H A Dxhci-histb.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2017-2018 HiSilicon Co., Ltd. http://www.hisilicon.com
11 #include <linux/dma-mapping.h>
46 return dev_get_drvdata(hcd->self.controller); in hcd_to_histb()
51 struct device_node *np = histb->dev->of_node; in xhci_histb_config()
54 if (of_property_match_string(np, "phys-names", "inno") >= 0) { in xhci_histb_config()
55 /* USB2 PHY chose ulpi 8bit interface */ in xhci_histb_config()
56 regval = readl(histb->ctrl + REG_GUSB2PHYCFG0); in xhci_histb_config()
60 writel(regval, histb->ctrl + REG_GUSB2PHYCFG0); in xhci_histb_config()
63 if (of_property_match_string(np, "phys-names", "combo") >= 0) { in xhci_histb_config()
[all …]
H A Dxhci-plat.c1 // SPDX-License-Identifier: GPL-2.0
3 * xhci-plat.c - xHCI host controller driver platform Bus Glue.
5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com
12 #include <linux/dma-mapping.h>
25 #include "xhci-plat.h"
26 #include "xhci-mvebu.h"
43 if (priv->plat_start) in xhci_priv_plat_start()
44 priv->plat_start(hcd); in xhci_priv_plat_start()
51 if (!priv->init_quirk) in xhci_priv_init_quirk()
54 return priv->init_quirk(hcd); in xhci_priv_init_quirk()
[all …]
/linux/include/linux/
H A Dusb.h1 /* SPDX-License-Identifier: GPL-2.0 */
14 #include <linux/errno.h> /* for -ENODEV */
29 /*-------------------------------------------------------------------------*/
32 * Host-side wrappers for standard USB descriptors ... these are parsed
36 * - devices have one (usually) or more configs;
37 * - configs have one (often) or more interfaces;
38 * - interfaces have one (usually) or more settings;
39 * - each interface setting has zero or (usually) more endpoints.
40 * - a SuperSpeed endpoint has a companion descriptor
44 * Devices may also have class-specific or vendor-specific descriptors.
[all …]
/linux/arch/arm/boot/dts/microchip/
H A Dat91-sama5d29_curiosity.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama5d29_curiosity.dts - Device Tree file for SAMA5D29 Curiosity board
10 /dts-v1/;
12 #include "sama5d2-pinfunc.h"
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/mfd/atmel-flexcom.h>
19 compatible = "microchip,sama5d29-curiosity", "atmel,sama5d29", "atmel,sama5d2", "atmel,sama5";
33 stdout-path = "serial0:115200n8";
38 clock-frequency = <32768>;
[all …]
H A Dat91-sama5d2_icp.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama5d2_icp.dts - Device Tree file for SAMA5D2-ICP board
11 /dts-v1/;
13 #include "sama5d2-pinfunc.h"
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/mfd/atmel-flexcom.h>
19 model = "Microchip SAMA5D2-ICP";
20 compatible = "microchip,sama5d2-icp", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
32 stdout-path = "serial0:115200n8";
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8996-xiaomi-common.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
15 compatible = "gpio-gate-clock";
17 #clock-cells = <0>;
18 enable-gpios = <&pm8994_gpios 15 GPIO_ACTIVE_HIGH>;
20 pinctrl-names = "default";
21 pinctrl-0 = <&divclk1_default>;
[all …]
/linux/drivers/usb/core/
H A Dport.c1 // SPDX-License-Identifier: GPL-2.0
27 return sysfs_emit(buf, "%s\n", port_dev->early_stop ? "yes" : "no"); in early_stop_show()
37 return -EINVAL; in early_stop_store()
40 port_dev->early_stop = 1; in early_stop_store()
42 port_dev->early_stop = 0; in early_stop_store()
52 struct usb_device *hdev = to_usb_device(dev->parent->parent); in disable_show()
54 struct usb_interface *intf = to_usb_interface(dev->parent); in disable_show()
55 int port1 = port_dev->portnum; in disable_show()
62 return -ENODEV; in disable_show()
72 kn = sysfs_break_active_protection(&dev->kobj, &attr->attr); in disable_show()
[all …]

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