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/linux/Documentation/devicetree/bindings/usb/
H A Dusb-xhci.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/usb-xhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mathias Nyman <mathias.nyman@intel.com>
13 - $ref: usb-hcd.yaml#
16 usb2-lpm-disable:
17 description: Indicates if we don't want to enable USB2 HW LPM
20 usb3-lpm-capable:
21 description: Determines if platform is USB3 LPM capable
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H A Dsnps,dwc3-common.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/snps,dwc3-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Felipe Balbi <balbi@kernel.org>
14 vendor-specific implementation or as a standalone component.
17 - $ref: usb-drd.yaml#
18 - if:
24 - dr_mode
28 $ref: usb-xhci.yaml#
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H A Dhisilicon,histb-xhci.txt6 - compatible: should be "hisilicon,hi3798cv200-xhci"
7 - reg: specifies physical base address and size of the registers
8 - interrupts : interrupt used by the controller
9 - clocks: a list of phandle + clock-specifier pairs, one for each
10 entry in clock-names
11 - clock-names: must contain
16 - resets: a list of phandle and reset specifier pairs as listed in
17 reset-names property.
18 - reset-names: must contain
20 - phys: a list of phandle + phy specifier pairs
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H A Dmediatek,mtk-xhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: usb-xhci.yaml
19 case 2: supports dual-role mode, and the host is based on xHCI driver.
25 - enum:
26 - mediatek,mt2701-xhci
27 - mediatek,mt2712-xhci
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/linux/arch/arm64/boot/dts/ti/
H A Dk3-am62p-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "ti,am62-usb";
14 clock-names = "ref";
15 ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>;
16 #address-cells = <2>;
17 #size-cells = <2>;
18 power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
27 interrupt-names = "host", "peripheral";
28 maximum-speed = "high-speed";
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H A Dk3-am62l-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only or MIT
4 * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
10 gic500: interrupt-controller@1800000 {
11 compatible = "arm,gic-v3";
18 #address-cells = <2>;
19 #size-cells = <2>;
20 #interrupt-cells = <3>;
21 interrupt-controller;
28 gic_its: msi-controller@1820000 {
29 compatible = "arm,gic-v3-its";
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H A Dk3-am62-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3";
19 #address-cells = <2>;
20 #size-cells = <2>;
22 #interrupt-cells = <3>;
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H A Dk3-am62a-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3";
24 #address-cells = <2>;
25 #size-cells = <2>;
27 #interrupt-cells = <3>;
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/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8195-evb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
11 compatible = "mediatek,mt8195-evb", "mediatek,mt8195";
18 stdout-path = "serial0:921600n8";
32 pinctrl-names = "default";
33 pinctrl-0 = <&i2c0_pin>;
34 clock-frequency = <100000>;
39 pinctrl-names = "default";
40 pinctrl-0 = <&i2c1_pin>;
41 clock-frequency = <400000>;
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/linux/arch/arm64/boot/dts/socionext/
H A Duniphier-pxs3-ref-gadget0.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 // Device Tree Source for UniPhier PXs3 Reference Board (for USB-Device #0)
8 /dts-v1/;
9 #include "uniphier-pxs3-ref.dts"
12 model = "UniPhier PXs3 Reference Board (USB-Device #0)";
23 pinctrl-0 = <&pinctrl_usb0_device>;
27 snps,usb2-gadget-lpm-disable;
28 phy-names = "usb2-phy", "usb3-phy";
33 /delete-property/ vbus-supply;
37 /delete-property/ vbus-supply;
[all …]
H A Duniphier-pxs3-ref-gadget1.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 // Device Tree Source for UniPhier PXs3 Reference Board (for USB-Device #1)
8 /dts-v1/;
9 #include "uniphier-pxs3-ref.dts"
12 model = "UniPhier PXs3 Reference Board (USB-Device #1)";
23 pinctrl-0 = <&pinctrl_usb1_device>;
27 snps,usb2-gadget-lpm-disable;
28 phy-names = "usb2-phy", "usb3-phy";
33 /delete-property/ vbus-supply;
37 /delete-property/ vbus-supply;
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/linux/Documentation/ABI/testing/
H A Dsysfs-bus-usb10 This allows to avoid side-effects with drivers
28 drivers, non-authorized one are not. By default, wired
33 Contact: linux-usb@vger.kernel.org
67 What: /sys/bus/usb-serial/drivers/.../new_id
69 Contact: linux-usb@vger.kernel.org
72 extra bus folder "usb-serial" in sysfs; apart from that
97 If CONFIG_PM is set and a USB 2.0 lpm-capable device is plugged
98 in to a xHCI host which support link PM, it will perform a LPM
99 test; if the test is passed and host supports USB2 hardware LPM
100 (xHCI 1.0 feature), USB2 hardware LPM will be enabled for the
[all …]
/linux/Documentation/driver-api/usb/
H A Dpower-management.rst1 .. _usb-power-management:
7 :Date: Last-updated: February 2014
11 ---------
17 * Changing the default idle-delay time
31 -------------------------
35 component is ``suspended`` it is in a nonfunctional low-power state; it
37 ``resumed`` (returned to a functional full-power state) when the kernel
67 ----------------------
85 --------------------------
101 -------------------
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/linux/drivers/usb/cdns3/
H A Dcdns3-gadget.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2018-2019 Cadence.
6 * Copyright (C) 2017-2018 NXP
15 #include <linux/dma-direction.h>
18 * USBSS-DEV register interface.
23 * struct cdns3_usb_regs - device controller registers.
53 * @buf_addr: Address for On-chip Buffer operations.
54 * @buf_data: Data for On-chip Buffer operations.
55 * @buf_ctrl: On-chip Buffer Access Control.
123 /* USB_CONF - bitmasks */
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H A Dcdnsp-gadget.h1 /* SPDX-License-Identifier: GPL-2.0 */
15 #include <linux/io-64-nonatomic-lo-hi.h>
19 /* Max number slots - only 1 is allowed. */
43 * struct cdnsp_cap_regs - CDNSP Registers.
46 * @hcs_params1: HCSPARAMS1 - Structural Parameters 1
47 * @hcs_params2: HCSPARAMS2 - Structural Parameters 2
48 * @hcs_params3: HCSPARAMS3 - Structural Parameters 3
49 * @hcc_params: HCCPARAMS - Capability Parameters
50 * @db_off: DBOFF - Doorbell array offset
51 * @run_regs_off: RTSOFF - Runtime register space offset
[all …]
/linux/drivers/usb/dwc3/
H A Dhost.c1 // SPDX-License-Identifier: GPL-2.0
3 * host.c - DesignWare USB3 DRD Controller Host Glue
5 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com
16 #include "../host/xhci-port.h"
17 #include "../host/xhci-ext-caps.h"
18 #include "../host/xhci-caps.h"
19 #include "../host/xhci-plat.h"
26 * dwc3_power_off_all_roothub_ports - Power off all Root hub ports
39 if (dwc->xhci_resources[0].start) { in dwc3_power_off_all_roothub_ports()
40 if (dwc->xhci_resources[0].flags & IORESOURCE_MEM_NONPOSTED) in dwc3_power_off_all_roothub_ports()
[all …]
H A Ddwc3-pci.c1 // SPDX-License-Identifier: GPL-2.0
3 * dwc3-pci.c - PCI Specific glue layer
5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com
65 #define PCI_INTEL_BXT_DSM_GUID "732b85d5-b7a7-4a1b-9ba0-4bbd00ffd511"
75 * struct dwc3_pci - Driver private structure
96 { "reset-gpios", &reset_gpios, 1 },
97 { "cs-gpios", &cs_gpios, 1 },
117 return -ENOMEM; in dwc3_byt_enable_ulpi_refclock()
155 * be re-allocated if being used because the side band flow control signals
157 * - 1 High BW Bulk IN (IN#1) (RTIT)
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H A Dcore.c1 // SPDX-License-Identifier: GPL-2.0
3 * core.c - DesignWare USB3 DRD Controller Core file
5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com
24 #include <linux/dma-mapping.h>
45 #include "../host/xhci-ext-caps.h"
50 * dwc3_get_dr_mode - Validates and sets dr_mode
56 struct device *dev = dwc->dev; in dwc3_get_dr_mode()
59 if (dwc->dr_mode == USB_DR_MODE_UNKNOWN) in dwc3_get_dr_mode()
60 dwc->dr_mode = USB_DR_MODE_OTG; in dwc3_get_dr_mode()
62 mode = dwc->dr_mode; in dwc3_get_dr_mode()
[all …]
/linux/drivers/usb/core/
H A Dhub.c1 // SPDX-License-Identifier: GPL-2.0
79 /* Protect struct usb_device->state and ->children members
80 * Note: Both are also protected by ->dev.sem, except that ->state can
88 /* synchronize hub-port add/remove and peering operations */
98 * 10 seconds to send reply for the initial 64-byte descriptor request.
100 /* define initial 64-byte descriptor request timeout in milliseconds */
104 "initial 64-byte descriptor request timeout in milliseconds "
105 "(default 5000 - 5.0 seconds)");
149 if (hub_is_superspeedplus(hub->hdev)) in portspeed()
151 if (hub_is_superspeed(hub->hdev)) in portspeed()
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H A Dport.c1 // SPDX-License-Identifier: GPL-2.0
29 return sysfs_emit(buf, "%s\n", str_yes_no(port_dev->early_stop)); in early_stop_show()
39 return -EINVAL; in early_stop_store()
42 port_dev->early_stop = 1; in early_stop_store()
44 port_dev->early_stop = 0; in early_stop_store()
54 struct usb_device *hdev = to_usb_device(dev->parent->parent); in disable_show()
56 struct usb_interface *intf = to_usb_interface(dev->parent); in disable_show()
57 int port1 = port_dev->portnum; in disable_show()
64 return -ENODEV; in disable_show()
74 kn = sysfs_break_active_protection(&dev->kobj, &attr->attr); in disable_show()
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/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8996-xiaomi-common.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
15 compatible = "gpio-gate-clock";
17 #clock-cells = <0>;
18 enable-gpios = <&pm8994_gpios 15 GPIO_ACTIVE_HIGH>;
20 pinctrl-names = "default";
21 pinctrl-0 = <&divclk1_default>;
[all …]
/linux/arch/arm/boot/dts/microchip/
H A Dat91-sama5d2_icp.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama5d2_icp.dts - Device Tree file for SAMA5D2-ICP board
11 /dts-v1/;
13 #include "sama5d2-pinfunc.h"
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/mfd/atmel-flexcom.h>
19 model = "Microchip SAMA5D2-ICP";
20 compatible = "microchip,sama5d2-icp", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
32 stdout-path = "serial0:115200n8";
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/linux/drivers/usb/host/
H A Dxhci.h1 /* SPDX-License-Identifier: GPL-2.0 */
19 #include <linux/io-64-nonatomic-lo-hi.h>
20 #include <linux/io-64-nonatomic-hi-lo.h>
22 /* Code sharing between pci-quirks and xhci hcd */
23 #include "xhci-ext-caps.h"
24 #include "pci-quirks.h"
26 #include "xhci-port.h"
27 #include "xhci-caps.h"
35 /* Max number of USB devices for any host controller - limit in section 6.1 */
55 * struct xhci_cap_regs - xHCI Host Controller Capability Registers.
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H A Dxhci.c1 // SPDX-License-Identifier: GPL-2.0
22 #include <linux/dma-mapping.h>
23 #include <linux/usb/xhci-sideband.h>
26 #include "xhci-trace.h"
27 #include "xhci-debugfs.h"
28 #include "xhci-dbgcap.h"
47 writel(val, &port->port_reg->portsc); in xhci_portsc_writel()
53 return readl(&port->port_reg->portsc); in xhci_portsc_readl()
61 if (!td || !td->start_seg) in td_on_ring()
64 xhci_for_each_ring_seg(ring->first_seg, seg) { in td_on_ring()
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/linux/arch/arm64/boot/dts/exynos/
H A Dexynos7870.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/samsung,exynos7870-cmu.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #address-cells = <2>;
15 #size-cells = <1>;
17 interrupt-parent = <&gic>;
31 #address-cells = <1>;
32 #size-cells = <0>;
34 cpu-map {
68 compatible = "arm,cortex-a53";
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