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/freebsd/sys/contrib/device-tree/Bindings/usb/
H A Dusb-xhci.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/usb-xhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mathias Nyman <mathias.nyman@intel.com>
13 -
[all...]
H A Ddwc3.txt3 DWC3- USB3 CONTROLLER. Complies to the generic USB binding properties
7 - compatible: must be "snps,dwc3"
8 - reg : Address and length of the register set for the device
9 - interrupts: Interrupts used by the dwc3 controller.
10 - clock-names: list of clock names. Ideally should be "ref",
12 - clocks: list of phandle and clock specifier pairs corresponding to
13 entries in the clock-names property.
16 clocks are optional if the parent node (i.e. glue-layer) is compatible to
18 "cavium,octeon-7130-usb-uctl"
20 "samsung,exynos5250-dwusb3"
[all …]
H A Dsnps,dwc3.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Felipe Balbi <balbi@kernel.org>
14 be presented as a standalone DT node with an optional vendor-specific
18 - $ref: usb-drd.yaml#
19 - if:
25 - dr_mode
29 $ref: usb-xhci.yaml#
35 - const: snps,dwc3
[all …]
H A Dusb-xhci.txt4 - compatible: should be one or more of
6 - "generic-xhci" for generic XHCI device
7 - "marvell,armada3700-xhci" for Armada 37xx SoCs
8 - "marvell,armada-375-xhci" for Armada 375 SoCs
9 - "marvell,armada-380-xhci" for Armada 38x SoCs
10 - "brcm,bcm7445-xhci" for Broadcom STB SoCs with XHCI
11 - "xhci-platform" (deprecated)
14 SoC-specific version corresponding to the platform first
17 - reg: should contain address and length of the standard XHCI
19 - interrupts: one XHCI interrupt should be described here.
[all …]
H A Dhisilicon,histb-xhci.txt6 - compatible: should be "hisilicon,hi3798cv200-xhci"
7 - reg: specifies physical base address and size of the registers
8 - interrupts : interrupt used by the controller
9 - clocks: a list of phandle + clock-specifier pairs, one for each
10 entry in clock-names
11 - clock-names: must contain
16 - resets: a list of phandle and reset specifier pairs as listed in
17 reset-names property.
18 - reset-names: must contain
20 - phys: a list of phandle + phy specifier pairs
[all …]
H A Dmediatek,mtk-xhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: usb-xhci.yaml
19 case 2: supports dual-role mode, and the host is based on xHCI driver.
25 - enum:
26 - mediatek,mt2701-xhci
27 - mediatek,mt2712-xhci
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-am62p-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "ti,am62-usb";
14 clock-names = "ref";
15 ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>;
16 #address-cells = <2>;
17 #size-cells = <2>;
18 power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
27 interrupt-names = "host", "peripheral";
28 maximum-speed = "high-speed";
[all …]
H A Dk3-am62a-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3";
25 #address-cells = <2>;
26 #size-cells = <2>;
28 #interrupt-cells = <3>;
[all …]
H A Dk3-am62-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3";
19 #address-cells = <2>;
20 #size-cells = <2>;
22 #interrupt-cells = <3>;
[all …]
H A Dk3-am62p-j722s-common-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
11 #address-cells = <1>;
12 #size-cells = <1>;
15 gic500: interrupt-controller@1800000 {
16 compatible = "arm,gic-v3";
17 #address-cells = <2>;
18 #size-cells = <2>;
20 #interrupt-cells = <3>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt8195-evb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
11 compatible = "mediatek,mt8195-evb", "mediatek,mt8195";
18 stdout-path = "serial0:921600n8";
32 pinctrl-names = "default";
33 pinctrl-0 = <&i2c0_pin>;
34 clock-frequency = <100000>;
39 pinctrl-names = "default";
40 pinctrl-0 = <&i2c1_pin>;
41 clock-frequency = <400000>;
[all …]
H A Dmt8395-radxa-nio-12l.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/pinctrl/mt8195-pinfunc.h>
13 #include <dt-bindings/regulator/mediatek,mt6360-regulator.h>
14 #include <dt-bindings/spmi/spmi.h>
15 #include <dt-bindings/usb/pd.h>
19 chassis-type = "embedded";
20 compatible = "radxa,nio-12l", "mediatek,mt8395", "mediatek,mt8195";
36 stdout-path = "serial0:921600n8";
[all …]
H A Dmt8195-cherry.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/spmi/spmi.h>
25 backlight_lcd0: backlight-lcd0 {
26 compatible = "pwm-backlight";
27 brightness-levels = <0 1023>;
28 default-brightness-level = <576>;
29 enable-gpios = <&pio 82 GPIO_ACTIVE_HIGH>;
30 num-interpolated-steps = <1023>;
32 power-supply = <&ppvar_sys>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/socionext/
H A Duniphier-pxs3-ref-gadget0.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 // Device Tree Source for UniPhier PXs3 Reference Board (for USB-Device #0)
8 /dts-v1/;
9 #include "uniphier-pxs3-ref.dts"
12 model = "UniPhier PXs3 Reference Board (USB-Device #0)";
23 pinctrl-0 = <&pinctrl_usb0_device>;
27 snps,usb2-gadget-lpm-disable;
28 phy-names = "usb2-phy", "usb3-phy";
33 /delete-property/ vbus-supply;
37 /delete-property/ vbus-supply;
[all …]
H A Duniphier-pxs3-ref-gadget1.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 // Device Tree Source for UniPhier PXs3 Reference Board (for USB-Device #1)
8 /dts-v1/;
9 #include "uniphier-pxs3-ref.dts"
12 model = "UniPhier PXs3 Reference Board (USB-Device #1)";
23 pinctrl-0 = <&pinctrl_usb1_device>;
27 snps,usb2-gadget-lpm-disable;
28 phy-names = "usb2-phy", "usb3-phy";
33 /delete-property/ vbus-supply;
37 /delete-property/ vbus-supply;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/microchip/
H A Dat91-sama5d29_curiosity.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama5d29_curiosity.dts - Device Tree file for SAMA5D29 Curiosity board
10 /dts-v1/;
12 #include "sama5d2-pinfunc.h"
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/mfd/atmel-flexcom.h>
19 compatible = "microchip,sama5d29-curiosity", "atmel,sama5d29", "atmel,sama5d2", "atmel,sama5";
33 stdout-path = "serial0:115200n8";
38 clock-frequency = <32768>;
[all …]
H A Dat91-sama5d2_icp.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama5d2_icp.dts - Device Tree file for SAMA5D2-ICP board
11 /dts-v1/;
13 #include "sama5d2-pinfunc.h"
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/mfd/atmel-flexcom.h>
19 model = "Microchip SAMA5D2-ICP";
20 compatible = "microchip,sama5d2-icp", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
32 stdout-path = "serial0:115200n8";
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dmsm8996-xiaomi-common.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
15 compatible = "gpio-gate-clock";
17 #clock-cells = <0>;
18 enable-gpios = <&pm8994_gpios 15 GPIO_ACTIVE_HIGH>;
20 pinctrl-names = "default";
21 pinctrl-0 = <&divclk1_default>;
[all …]
H A Dsa8775p-ride.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include "sa8775p-pmics.dtsi"
28 stdout-path = "serial0:115200n8";
33 regulators-0 {
34 compatible = "qcom,pmm8654au-rpmh-regulators";
35 qcom,pmic-id = "a";
38 regulator-name = "vreg_s4a";
[all …]
H A Dsm6375.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmcc.h>
7 #include <dt-bindings/clock/qcom,sm6375-gcc.h>
8 #include <dt-bindings/clock/qcom,sm6375-gpucc.h>
9 #include <dt-bindings/dma/qcom-gpi.h>
10 #include <dt-bindings/firmware/qcom,scm.h>
11 #include <dt-bindings/interconnect/qcom,osm-l3.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/mailbox/qcom-ipcc.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
[all …]
H A Dmsm8953.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
4 #include <dt-bindings/clock/qcom,gcc-msm8953.h>
5 #include <dt-bindings/clock/qcom,rpmcc.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/power/qcom-rpmpd.h>
9 #include <dt-bindings/soc/qcom,apr.h>
10 #include <dt-bindings/sound/qcom,q6afe.h>
11 #include <dt-bindings/sound/qcom,q6asm.h>
12 #include <dt-bindings/thermal/thermal.h>
[all …]
H A Dsm8650.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sm8650-camcc.h>
8 #include <dt-bindings/clock/qcom,sm8650-dispcc.h>
9 #include <dt-bindings/clock/qcom,sm8650-gcc.h>
10 #include <dt-bindings/clock/qcom,sm8650-gpucc.h>
11 #include <dt-bindings/clock/qcom,sm8650-tcsr.h>
12 #include <dt-bindings/clock/qcom,sm8650-videocc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/firmware/qcom,scm.h>
[all …]
H A Dsm8550.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sm8450-videocc.h>
8 #include <dt-bindings/clock/qcom,sm8550-camcc.h>
9 #include <dt-bindings/clock/qcom,sm8550-gcc.h>
10 #include <dt-bindings/clock/qcom,sm8550-gpucc.h>
11 #include <dt-bindings/clock/qcom,sm8550-tcsr.h>
12 #include <dt-bindings/clock/qcom,sm8550-dispcc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/firmware/qcom,scm.h>
[all …]
/freebsd/sys/dev/usb/controller/
H A Dxhcireg.h2 /*-
3 * SPDX-License-Identifier: BSD-2-Clause
38 #define PCI_XHCI_INTEL_XUSB2PR 0xD0 /* Intel USB2 Port Routing */
39 #define PCI_XHCI_INTEL_USB2PRM 0xD4 /* Intel USB2 Port Routing Mask */
62 #define XHCI_HCS0_AC64(x) ((x) & 0x1) /* 64-bit capable */
87 #define XHCI_STS_HCH 0x00000001 /* RO - Host Controller Halted */
88 #define XHCI_STS_HSE 0x00000004 /* RW - Host System Error */
89 #define XHCI_STS_EINT 0x00000008 /* RW - Event Interrupt */
90 #define XHCI_STS_PCD 0x00000010 /* RW - Port Change Detect */
91 #define XHCI_STS_SSS 0x00000100 /* RO - Save State Status */
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8mp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mp-clock.h>
7 #include <dt-bindings/power/imx8mp-power.h>
8 #include <dt-bindings/reset/imx8mp-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interconnect/fsl,imx8mp.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
15 #include "imx8mp-pinfunc.h"
[all …]

12