| /linux/Documentation/devicetree/bindings/phy/ |
| H A D | renesas,usb2-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/renesas,usb2-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Renesas R-Car generation 3 USB 2.0 PHY 10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> 15 - items: 16 - enum: 17 - renesas,usb2-phy-r8a77470 # RZ/G1C 18 - renesas,usb2-phy-r9a08g045 # RZ/G3S [all …]
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| H A D | ti,omap-usb2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/ti,omap-usb2.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: OMAP USB2 PHY 10 - Kishon Vijay Abraham I <kishon@ti.com> 11 - Roger Quadros <rogerq@kernel.org> 16 - items: 17 - enum: 18 - ti,dra7x-usb2 [all …]
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| H A D | socionext,uniphier-usb2-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/socionext,uniphier-usb2-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Socionext UniPhier USB2 PHY 11 USB2 controller implemented on Socionext UniPhier SoCs. 12 Pro4 SoC has both USB2 and USB3 host controllers, however, this USB3 13 controller doesn't include its own High-Speed PHY. This needs to specify 14 USB2 PHY instead of USB3 HS-PHY. 17 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com> [all …]
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| H A D | samsung,usb2-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/samsung,usb2-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krzysztof Kozlowski <krzk@kernel.org> 11 - Marek Szyprowski <m.szyprowski@samsung.com> 12 - Sylwester Nawrocki <s.nawrocki@samsung.com> 18 0 - USB device ("device"), 19 1 - USB host ("host"), 20 2 - HSIC0 ("hsic0"), [all …]
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| H A D | hisilicon,inno-usb2-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/hisilicon,inno-usb2-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: HiSilicon INNO USB2 PHY 10 - Pengcheng Li <lpc.li@hisilicon.com> 13 The INNO USB2 PHY device should be a child node of peripheral controller that 15 ports which are represented as child nodes of INNO USB2 PHY device. 20 - hisilicon,hi3798cv200-usb2-phy 21 - hisilicon,hi3798mv100-usb2-phy [all …]
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| H A D | nvidia,tegra194-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/nvidia,tegra194-xusb-padctl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or 22 super-speed USB. Other lanes are for various types of low-speed, full-speed 23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller 24 contains a software-configurable mux that sits between the I/O controller [all …]
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| H A D | amlogic,meson8b-usb2-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/amlogic,meson8b-usb2-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Amlogic Meson8, Meson8b, Meson8m2 and GXBB USB2 PHY 10 - Martin Blumenstingl <martin.blumenstingl@googlemail.com> 15 - items: 16 - enum: 17 - amlogic,meson8-usb2-phy 18 - amlogic,meson8b-usb2-phy [all …]
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| H A D | lantiq,ase-usb2-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/lantiq,ase-usb2-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Hauke Mehrtens <hauke@hauke-m.de> 18 - enum: 19 - lantiq,ase-usb2-phy 20 - lantiq,danube-usb2-phy 21 - lantiq,xrx100-usb2-phy 22 - lantiq,xrx200-usb2-phy [all …]
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| H A D | nvidia,tegra186-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/nvidia,tegra186-xusb-padctl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or 22 super-speed USB. Other lanes are for various types of low-speed, full-speed 23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller 24 contains a software-configurable mux that sits between the I/O controller [all …]
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| H A D | nvidia,tegra210-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/nvidia,tegra210-xusb-padctl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or 22 super-speed USB. Other lanes are for various types of low-speed, full-speed 23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller 24 contains a software-configurable mux that sits between the I/O controller [all …]
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| H A D | nvidia,tegra124-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/nvidia,tegra124-xusb-padctl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or 22 super-speed USB. Other lanes are for various types of low-speed, full-speed 23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller 24 contains a software-configurable mux that sits between the I/O controller [all …]
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| /linux/drivers/media/usb/dvb-usb/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 8 USB1.1 and USB2.0 DVB devices. 11 <file:Documentation/driver-api/media/drivers/dvb-usb.rst>. 19 bool "Enable extended debug support for all DVB-USB devices" 22 Say Y if you want to enable debugging. See modinfo dvb-usb (and the 28 tristate "AVerMedia AverTV DVB-T USB 2.0 (A800)" 34 Say Y here to support the AVerMedia AverTV DVB-T USB 2.0 (A800) receiver. 37 tristate "Afatech AF9005 DVB-T USB1.1 support" 42 Say Y here to support the Afatech AF9005 based DVB-T USB1.1 receiver 53 tristate "Azurewave DVB-S/S2 USB2.0 AZ6027 support" [all …]
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| /linux/Documentation/admin-guide/media/ |
| H A D | usb-cardlist.rst | 1 .. SPDX-License-Identifier: GPL-2.0 19 ``uvc-driver``. 23 card lists for such vendor-class devices. 35 some of the drivers have sub-drivers, not shown at this table. 36 In particular, gspca driver has lots of sub-drivers, 38 as shown at :doc:`gspca card list <gspca-cardlist>`. 45 b2c2-flexcop-usb Technisat/B2C2 Air/Sky/Cable2PC USB 47 dvb-as102 Abilis AS102 DVB receiver 48 dvb-ttusb-budget Technotrend/Hauppauge Nova - USB devices 49 dvb-usb-a800 AVerMedia AverTV DVB-T USB 2.0 (A800) [all …]
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| H A D | dvb-usb-dw2102-cardlist.rst | 1 .. SPDX-License-Identifier: GPL-2.0 3 dvb-usb-dw2102 cards list 8 .. flat-table:: 9 :header-rows: 1 11 :stub-columns: 0 13 * - Card name 14 - USB IDs 15 * - DVBWorld DVB-C 3101 USB2.0 16 - 04b4:3101 17 * - DVBWorld DVB-S 2101 USB2.0 [all …]
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| H A D | dvb-usb-dibusb-mc-cardlist.rst | 1 .. SPDX-License-Identifier: GPL-2.0 3 dvb-usb-dibusb-mc cards list 8 .. flat-table:: 9 :header-rows: 1 11 :stub-columns: 0 13 * - Card name 14 - USB IDs 15 * - Artec T1 USB2.0 TVBOX (please check the warm ID) 16 - 05d8:8109, 05d8:810a 17 * - Artec T14 - USB2.0 DVB-T [all …]
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| /linux/Documentation/devicetree/bindings/usb/ |
| H A D | amlogic,meson-g12a-usb-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Neil Armstrong <neil.armstrong@linaro.org> 14 The Amlogic G12A embeds a DWC3 USB IP Core configured for USB2 and USB3 15 in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode 18 A glue connects the DWC3 core to USB2 PHYs and optionally to an USB3 PHY. 20 One of the USB2 PHYs can be re-routed in peripheral mode to a DWC2 USB IP. 25 The Amlogic A1 embeds a DWC3 USB IP Core configured for USB2 in [all …]
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| H A D | nvidia,tegra194-xusb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/nvidia,tegra194-xusb.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 13 description: The Tegra xHCI controller supports both USB2 and USB3 interfaces 18 const: nvidia,tegra194-xusb 22 - description: base and length of the xHCI host registers 23 - description: base and length of the XUSB FPCI registers [all …]
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| /linux/drivers/media/usb/dvb-usb-v2/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 7 USB1.1 and USB2.0 DVB devices. 10 <file:Documentation/driver-api/media/drivers/dvb-usb.rst>. 20 tristate "Afatech AF9015 DVB-T USB2.0 support" 33 Say Y here to support the Afatech AF9015 based DVB-T USB2.0 receiver 36 tristate "Afatech AF9035 DVB-T USB2.0 support" 51 tristate "Anysee DVB-T/C USB2.0 support" 65 Anysee E30 C Plus DVB USB2.0 receiver. 68 tristate "Alcor Micro AU6610 USB2.0 support" 73 Say Y here to support the Sigmatek DVB-110 DVB-T USB2.0 receiver. [all …]
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| /linux/arch/arm64/boot/dts/nvidia/ |
| H A D | tegra234-p3768-0000+p3767.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/input/linux-event-codes.h> 4 #include <dt-bindings/input/gpio-keys.h> 6 #include "tegra234-p3767.dtsi" 17 stdout-path = "serial0:115200n8"; 20 bus@0 { 22 compatible = "nvidia,tegra194-hsuart"; 23 reset-names = "serial"; 28 compatible = "nvidia,tegra194-hsuart"; 29 reset-names = "serial"; [all …]
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| H A D | tegra234-p3740-0002+p3701-0008.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/linux-event-codes.h> 5 #include <dt-bindings/input/gpio-keys.h> 6 #include <dt-bindings/sound/rt5640.h> 7 #include "tegra234-p3701-0008.dtsi" 11 compatible = "nvidia,p3740-0002+p3701-0008", "nvidia,p3701-0008", "nvidia,tegra234"; 19 stdout-path = "serial0:115200n8"; 22 bus@0 { 29 dai-format = "i2s"; [all …]
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| /linux/drivers/phy/tegra/ |
| H A D | xusb.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2014-2022, NVIDIA CORPORATION. All rights reserved. 31 if (args->args_count != 0) in tegra_xusb_pad_of_xlate() 32 return ERR_PTR(-EINVAL); in tegra_xusb_pad_of_xlate() 34 for (i = 0; i < pad->soc->num_lanes; i++) { in tegra_xusb_pad_of_xlate() 35 if (!pad->lanes[i]) in tegra_xusb_pad_of_xlate() 38 if (pad->lanes[i]->dev.of_node == args->np) { in tegra_xusb_pad_of_xlate() 39 phy = pad->lanes[i]; in tegra_xusb_pad_of_xlate() 45 phy = ERR_PTR(-ENODEV); in tegra_xusb_pad_of_xlate() 53 .compatible = "nvidia,tegra124-xusb-padctl", [all …]
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| H A D | xusb-tegra186.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2016-2022, NVIDIA CORPORATION. All rights reserved. 21 #define HS_CURR_LEVEL_PADX_SHIFT(x) ((x) ? (11 + (x - 1) * 6) : 0) 22 #define HS_CURR_LEVEL_PAD_MASK 0x3f 24 #define HS_TERM_RANGE_ADJ_MASK 0xf 26 #define HS_SQUELCH_MASK 0x7 28 #define RPD_CTRL_SHIFT 0 29 #define RPD_CTRL_MASK 0x1f 32 #define XUSB_PADCTL_USB2_PAD_MUX 0x4 34 #define USB2_PORT_MASK 0x3 [all …]
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| H A D | xusb-tegra124.c | 1 // SPDX-License-Identifier: GPL-2.0-only 21 #define FUSE_SKU_CALIB_HS_CURR_LEVEL_PADX_SHIFT(x) ((x) ? 15 : 0) 22 #define FUSE_SKU_CALIB_HS_CURR_LEVEL_PAD_MASK 0x3f 24 #define FUSE_SKU_CALIB_HS_IREF_CAP_MASK 0x3 26 #define FUSE_SKU_CALIB_HS_SQUELCH_LEVEL_MASK 0x3 28 #define FUSE_SKU_CALIB_HS_TERM_RANGE_ADJ_MASK 0xf 30 #define XUSB_PADCTL_USB2_PORT_CAP 0x008 32 #define XUSB_PADCTL_USB2_PORT_CAP_PORT_CAP_MASK 0x3 33 #define XUSB_PADCTL_USB2_PORT_CAP_DISABLED 0x0 34 #define XUSB_PADCTL_USB2_PORT_CAP_HOST 0x1 [all …]
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| /linux/drivers/usb/host/ |
| H A D | fsl-mph-dr-of.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Setup platform devices needed by the Freescale multi-port host 4 * and/or dual-role USB controller modules based on the description 17 #include <linux/dma-mapping.h> 28 .drivers = { "fsl-ehci", NULL, NULL, }, 33 .drivers = { "fsl-usb2-otg", "fsl-ehci", "fsl-usb2-udc", }, 38 .drivers = { "fsl-usb2-udc", NULL, NULL, }, 50 for (i = 0; i < ARRAY_SIZE(dr_mode_data); i++) { in get_dr_mode_data() 57 return &dr_mode_data[0]; /* mode not specified, use host */ in get_dr_mode_data() 84 const struct resource *res = ofdev->resource; in fsl_usb2_device_register() [all …]
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| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | renesas,rcar-usb2-clock-sel.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/renesas,rcar-usb2-clock-sel.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Renesas R-Car USB 2.0 clock selector 10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> 19 Case 1: An external clock connects to R-Car SoC 20 +----------+ +--- R-Car ---------------------+ 21 |External |---|USB_EXTAL ---> all usb channels| 23 +----------+ +-------------------------------+ [all …]
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