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/freebsd/sys/contrib/device-tree/Bindings/connector/
H A Dusb-connector.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/connector/usb-connecto
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/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dnvidia,tegra194-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra194-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
14 The Tegra XUSB pad controller manages a set of I/O lanes (with differential
16 is controlled by a HW block referred to as a "pad" in the Tegra hardware
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
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H A Dnvidia,tegra186-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra186-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
14 The Tegra XUSB pad controller manages a set of I/O lanes (with differential
16 is controlled by a HW block referred to as a "pad" in the Tegra hardware
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
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H A Dnvidia,tegra210-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra210-xus
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H A Dnvidia,tegra124-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra124-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
14 The Tegra XUSB pad controller manages a set of I/O lanes (with differential
16 is controlled by a HW block referred to as a "pad" in the Tegra hardware
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
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/freebsd/sys/contrib/device-tree/Bindings/usb/
H A Dmediatek,musb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/mediatek,musb.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Min Guo <min.guo@mediatek.com>
15 pattern: '^usb@[0-9a-f]+$'
19 - enum:
20 - mediatek,mt8516-musb
21 - mediatek,mt2701-musb
22 - mediatek,mt7623-musb
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H A Dmediatek,mtu3.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/mediatek,mtu3.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: usb-drd.yaml
17 The DRD controller has a glue layer IPPC (IP Port Control), and its host is
23 - enum:
24 - mediatek,mt2712-mtu3
25 - mediatek,mt8173-mtu3
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H A Dmediatek,musb.txt2 -------------------------------------------
5 - compatible : should be one of:
6 "mediatek,mt2701-musb"
8 followed by "mediatek,mtk-musb"
9 - reg : specifies physical base address and size of
11 - interrupts : interrupt used by musb controller
12 - interrupt-names : must be "mc"
13 - phys : PHY specifier for the OTG phy
14 - dr_mode : should be one of "host", "peripheral" or "otg",
15 refer to usb/generic.txt
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H A Dwillsemi,wusb3801.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/willsemi,wusb3801.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: WUSB3801 Type-C port controller
10 The Will Semiconductor WUSB3801 is a USB Type-C port controller which
12 compatible with the USB Type-C Cable and Connector Specification v1.2.
15 - Samuel Holland <samuel@sholland.org>
20 - willsemi,wusb3801
28 connector:
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H A Drichtek,rt1719.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/usb/richte
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H A Dst,typec-stm32g0.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/st,typec-stm32g0.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32G0 USB Type-C PD controller
10 The STM32G0 MCU can be programmed to control Type-C connector(s) through I2C
11 typically using the UCSI protocol over I2C, with a dedicated alert
15 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
19 const: st,stm32g0-typec
27 connector:
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H A Drichtek,rt1711h.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/richtek,rt1711h.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Richtek RT1711H Type-C Port Switch and Power Delivery controller
10 - Gene Chen <gene_chen@richtek.com>
13 The RT1711H is a USB Type-C controller that complies with the latest
14 USB Type-C and PD standards. It does the USB Type-C detection including attach
15 and orientation. It integrates the physical layer of the USB BMC power
17 support for alternative interfaces of the Type-C specification.
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H A Drichtek,rt1711h.txt4 - compatible : Must be "richtek,rt1711h".
5 - reg : Must be 0x4e, it's slave address of RT1711H.
6 - interrupts : <a b> where a is the interrupt number and b represents an
9 Required sub-node:
10 - connector: The "usb-c-connector" attached to the tcpci chip, the bindings
11 of connector node are specified in
12 Documentation/devicetree/bindings/connector/usb-connector.yaml
18 interrupt-parent = <&gpio26>;
21 usb_con: connector {
22 compatible = "usb-c-connector";
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H A Dmediatek,mt6360-tcpc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/mediatek,mt6360-tcpc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek MT6360 Type-C Port Switch and Power Delivery controller
10 - ChiYuan Huang <cy_huang@richtek.com>
13 Mediatek MT6360 is a multi-functional device. It integrates charger, ADC, flash, RGB indicators,
15 This document only describes MT6360 Type-C Port Switch and Power Delivery controller.
20 - mediatek,mt6360-tcpc
25 interrupt-names:
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H A Dmsm-hsusb.txt6 - compatible: Should contain "qcom,ehci-host"
7 - regs: offset and length of the register set in the memory map
8 - usb-phy: phandle for the PHY device
13 compatible = "qcom,ehci-host";
15 usb-phy = <&usb_otg>;
18 USB PH
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H A Dgeneric.txt1 Generic USB Properties
4 - maximum-speed: tells USB controllers we want to work up to a certain
5 speed. Valid arguments are "super-speed-plus",
6 "super-speed", "high-speed", "full-speed" and
7 "low-speed". In case this isn't passed via DT, USB
10 - dr_mode: tells Dual-Role USB controllers that we want to work on a
13 passed via DT, USB DRD controllers should default to
15 - phy_type: tells USB controllers that we want to configure the core to support
16 a UTMI+ PHY with an 8- or 16-bit interface if UTMI+ is
18 In case this isn't passed via DT, USB controllers should
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H A Dcypress,cypd4226.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/cypress,cypd4226.yaml#
5 $schema: http://devicetree.org/meta-schema
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H A Dmediatek,mtu3.txt4 - compatible : should be "mediatek,<soc-model>-mtu3", "mediatek,mtu3",
5 soc-model is the name of SoC, such as mt8173, mt2712 etc,
8 - "mediatek,mt8173-mtu3"
9 - reg : specifies physical base address and size of the registers
10 - reg-names: should be "mac" for device IP and "ippc" for IP port control
11 - interrupts : interrupt used by the device IP
12 - power-domains : a phandle to USB power domain node to control USB's
14 - vusb33-supply : regulator of USB avdd3.3v
15 - clocks : a list of phandle + clock-specifier pairs, one for each
16 entry in clock-names
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H A Dchipidea,usb2-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/chipidea,usb2-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: USB2 ChipIdea USB controller Common Properties
10 - Xu Yang <xu.yang_2@nxp.com>
25 clock-names:
31 power-domains:
37 reset-names:
40 "#reset-cells":
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H A Dusb-drd.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/usb-drd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic USB OTG Controller
10 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
13 otg-rev:
15 Tells usb driver the release number of the OTG and EH supplement with
16 which the device and its descriptors are compliant, in binary-coded
18 features (HNP/SRP/ADP) is enabled. If ADP is required, otg-rev should be
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/freebsd/sys/contrib/device-tree/Bindings/soc/qcom/
H A Dqcom,pmic-glink.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom,pmic-glink.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm PMIC GLINK firmware interface for battery management, USB
8 Type-C and other things.
11 - Bjorn Andersson <andersson@kernel.org>
14 The PMIC GLINK service, running on a coprocessor on some modern Qualcomm
15 platforms and implement USB Type-C handling and battery management. This
18 particularly the USB Type-C controllers relationship with USB and DisplayPort
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/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3588-friendlyelec-cm3588-nas.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/pinctrl/rockchip.h>
14 #include <dt-bindings/usb/pd.h>
15 #include "rk3588-friendlyelec-cm3588.dtsi"
19 compatible = "friendlyarm,cm3588-nas", "friendlyarm,cm3588", "rockchip,rk3588";
21 adc_key_recovery: adc-key-recovery {
22 compatible = "adc-keys";
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/freebsd/sys/contrib/device-tree/Bindings/power/supply/
H A Drichtek,rt5033-charger.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/supply/richtek,rt5033-charger.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jakob Hauser <jahau@rocketmail.com>
14 under sub-node named "charger" using the following format.
18 const: richtek,rt5033-charger
20 monitored-battery:
26 precharge-current-microamp:
27 Current of pre-charge mode. The pre-charge current levels are 350 mA
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/freebsd/sys/contrib/device-tree/Bindings/platform/
H A Dacer,aspire1-ec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/platform/acer,aspire1-ec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nikita Travkin <nikita@trvn.ru>
14 and charging as well as to provide a set of misc features such as the
15 laptop lid status and HPD events for the USB Type-C DP alt mode.
19 const: acer,aspire1-ec
27 connector:
28 $ref: /schemas/connector/usb-connector.yaml#
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/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Dmaxim,max77693.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chanwoo Choi <cw00.choi@samsung.com>
11 - Krzysztof Kozlowski <krzk@kernel.org>
14 This is a part of device tree bindings for Maxim MAX77693 MicroUSB
17 The Maxim MAX77693 is a MicroUSB and Companion Power Management IC which
37 max77693-muic:
44 const: maxim,max77693-muic
47 - compatible
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