Searched +full:uniphier +full:- +full:efuse (Results 1 – 12 of 12) sorted by relevance
/linux/Documentation/devicetree/bindings/soc/socionext/ |
H A D | socionext,uniphier-soc-glue-debug.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-soc-glue-debug.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Socionext UniPhier SoC-glue logic debug part 10 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com> 13 SoC-glue logic debug part implemented on Socionext UniPhier SoCs is 20 - enum: 21 - socionext,uniphier-ld4-soc-glue-debug 22 - socionext,uniphier-pro4-soc-glue-debug [all …]
|
/linux/Documentation/devicetree/bindings/nvmem/ |
H A D | socionext,uniphier-efuse.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/nvmem/socionext,uniphier-efuse.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Socionext UniPhier eFuse 10 - Keiji Hayashibara <hayashibara.keiji@socionext.com> 11 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com> 14 - $ref: nvmem.yaml# 15 - $ref: nvmem-deprecated-cells.yaml# 19 const: socionext,uniphier-efuse [all …]
|
/linux/arch/arm/boot/dts/socionext/ |
H A D | uniphier-pro5.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 // Device Tree Source for UniPhier Pro5 SoC 5 // Copyright (C) 2015-2016 Socionext Inc. 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 compatible = "socionext,uniphier-pro5"; 12 #address-cells = <1>; 13 #size-cells = <1>; 16 #address-cells = <1>; 17 #size-cells = <0>; 21 compatible = "arm,cortex-a9"; [all …]
|
H A D | uniphier-ld4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 // Device Tree Source for UniPhier LD4 SoC 5 // Copyright (C) 2015-2016 Socionext Inc. 8 #include <dt-bindings/gpio/uniphier-gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 compatible = "socionext,uniphier-ld4"; 13 #address-cells = <1>; 14 #size-cells = <1>; 17 #address-cells = <1>; 18 #size-cells = <0>; [all …]
|
H A D | uniphier-pro4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 // Device Tree Source for UniPhier Pro4 SoC 5 // Copyright (C) 2015-2016 Socionext Inc. 8 #include <dt-bindings/gpio/uniphier-gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 compatible = "socionext,uniphier-pro4"; 13 #address-cells = <1>; 14 #size-cells = <1>; 17 #address-cells = <1>; 18 #size-cells = <0>; [all …]
|
H A D | uniphier-sld8.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 // Device Tree Source for UniPhier sLD8 SoC 5 // Copyright (C) 2015-2016 Socionext Inc. 8 #include <dt-bindings/gpio/uniphier-gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 compatible = "socionext,uniphier-sld8"; 13 #address-cells = <1>; 14 #size-cells = <1>; 17 #address-cells = <1>; 18 #size-cells = <0>; [all …]
|
H A D | uniphier-pxs2.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 // Device Tree Source for UniPhier PXs2 SoC 5 // Copyright (C) 2015-2016 Socionext Inc. 8 #include <dt-bindings/gpio/uniphier-gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/thermal/thermal.h> 13 compatible = "socionext,uniphier-pxs2"; 14 #address-cells = <1>; 15 #size-cells = <1>; 18 #address-cells = <1>; [all …]
|
/linux/drivers/nvmem/ |
H A D | uniphier-efuse.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * UniPhier eFuse driver 12 #include <linux/nvmem-provider.h> 27 *val++ = readb(priv->base + reg + offs); in uniphier_reg_read() 34 struct device *dev = &pdev->dev; in uniphier_efuse_probe() 42 return -ENOMEM; in uniphier_efuse_probe() 44 priv->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in uniphier_efuse_probe() 45 if (IS_ERR(priv->base)) in uniphier_efuse_probe() 46 return PTR_ERR(priv->base); in uniphier_efuse_probe() 62 { .compatible = "socionext,uniphier-efuse",}, [all …]
|
/linux/arch/arm64/boot/dts/socionext/ |
H A D | uniphier-ld11.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 // Device Tree Source for UniPhier LD11 SoC 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/gpio/uniphier-gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 compatible = "socionext,uniphier-ld11"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 interrupt-parent = <&gic>; 19 #address-cells = <2>; [all …]
|
H A D | uniphier-pxs3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 // Device Tree Source for UniPhier PXs3 SoC 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/gpio/uniphier-gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/thermal/thermal.h> 14 compatible = "socionext,uniphier-pxs3"; 15 #address-cells = <2>; 16 #size-cells = <2>; 17 interrupt-parent = <&gic>; [all …]
|
H A D | uniphier-ld20.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 // Device Tree Source for UniPhier LD20 SoC 5 // Copyright (C) 2015-2016 Socionext Inc. 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/gpio/uniphier-gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/thermal/thermal.h> 14 compatible = "socionext,uniphier-ld20"; 15 #address-cells = <2>; 16 #size-cells = <2>; [all …]
|
/linux/ |
H A D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-scsi@vger.kernel.org 88 F: drivers/scsi/3w-* [all …]
|