| /freebsd/tools/tools/locale/etc/charmaps/ |
| H A D | eucKR.TXT | 12436 0xCAA1 0x4F3D #CJK UNIFIED IDEOGRAPH
12437 0xCAA2 0x4F73 #CJK UNIFIED IDEOGRAPH
12438 0xCAA3 0x5047 #CJK UNIFIED IDEOGRAPH
12439 0xCAA4 0x50F9 #CJK UNIFIED IDEOGRAPH
12440 0xCAA5 0x52A0 #CJK UNIFIED IDEOGRAPH
12441 0xCAA6 0x53EF #CJK UNIFIED IDEOGRAPH
12442 0xCAA7 0x5475 #CJK UNIFIED IDEOGRAPH
12443 0xCAA8 0x54E5 #CJK UNIFIED IDEOGRAPH
12444 0xCAA9 0x5609 #CJK UNIFIED IDEOGRAPH
12445 0xCAAA 0x5AC1 #CJK UNIFIED IDEOGRAPH
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/arm64/ |
| H A D | recommended.json | 69 "PublicDescription": "Attributable Level 1 data or unified TLB access, read",
75 "PublicDescription": "Attributable Level 1 data or unified TLB access, write",
123 "PublicDescription": "Attributable Level 2 data or unified TLB refill, read",
129 "PublicDescription": "Attributable Level 2 data or unified TLB refill, write",
135 "PublicDescription": "Attributable Level 2 data or unified TLB access, read",
141 "PublicDescription": "Attributable Level 2 data or unified TLB access, write",
411 "PublicDescription": "Attributable Level 3 data or unified cache access, read",
414 "BriefDescription": "Attributable Level 3 data or unified cache access, read"
417 "PublicDescription": "Attributable Level 3 data or unified cache access, write",
420 "BriefDescription": "Attributable Level 3 data or unified cache access, write"
[all …]
|
| H A D | armv8-recommended.json | 69 "PublicDescription": "Attributable Level 1 data or unified TLB access, read",
75 "PublicDescription": "Attributable Level 1 data or unified TLB access, write",
123 "PublicDescription": "Attributable Level 2 data or unified TLB refill, read",
129 "PublicDescription": "Attributable Level 2 data or unified TLB refill, write",
135 "PublicDescription": "Attributable Level 2 data or unified TLB access, read",
141 "PublicDescription": "Attributable Level 2 data or unified TLB access, write",
411 "PublicDescription": "Attributable Level 3 data or unified cache access, read",
414 "BriefDescription": "Attributable Level 3 data or unified cache access, read"
417 "PublicDescription": "Attributable Level 3 data or unified cache access, write",
420 "BriefDescription": "Attributable Level 3 data or unified cache access, write"
[all …]
|
| H A D | common-and-microarch.json | 219 "PublicDescription": "Attributable Level 1 data or unified TLB access",
222 "BriefDescription": "Attributable Level 1 data or unified TLB access"
261 "PublicDescription": "Attributable Level 2 data or unified TLB access",
264 "BriefDescription": "Attributable Level 2 data or unified TLB access"
309 …itional latency because it returns data from outside the Level 1 data or unified cache of this pro…
393 …unified cache of this processing element. The event indicates to software that the access missed …
399 …unified cache of this processing element. The event indicates to software that the access missed …
|
| /freebsd/contrib/file/magic/Magdir/ |
| H A D | diff | 14 # diff output text (strength=40=40+0) after unified diff output (strength=131=38+93)
36 # diff output text output text (strength=38=38+0) after unified diff output (strength=131=38+93)
49 # RCS/CVS diff output text (strength=36=36+0) after unified diff output (strength=131=38+93)
102 # unified diff
106 # http://mark0.net/download/triddefs_xml.7z/defs/d/diff-unified.trid.xml
107 # Note: called "unified diff output" by TrID and
112 >0 use diff-unified
115 # unified diff (strength=131=38+93) before
124 >0 use diff-unified
125 # check for 3 characteristic lines of unified diff
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/cpufreq/ |
| H A D | cpufreq-qcom-hw.yaml | 231 cache-unified;
236 cache-unified;
252 cache-unified;
268 cache-unified;
284 cache-unified;
300 cache-unified;
316 cache-unified;
332 cache-unified;
348 cache-unified;
|
| /freebsd/sys/contrib/device-tree/Bindings/arm/socionext/ |
| H A D | socionext,uniphier-system-cache.yaml | 35 cache-unified: true
58 - cache-unified
71 cache-unified;
84 cache-unified;
96 cache-unified;
|
| /freebsd/sys/contrib/device-tree/Bindings/cache/ |
| H A D | socionext,uniphier-system-cache.yaml | 35 cache-unified: true
58 - cache-unified
71 cache-unified;
84 cache-unified;
96 cache-unified;
|
| /freebsd/sys/contrib/device-tree/Bindings/nds32/ |
| H A D | atl2c.txt | 18 - cache-unified : Specifies the cache is a unified cache.
26 cache-unified;
|
| /freebsd/share/misc/ |
| H A D | pci_vendors | 19396 4001 T420-CR Unified Wire Ethernet Controller
19397 4002 T422-CR Unified Wire Ethernet Controller
19398 4003 T440-CR Unified Wire Ethernet Controller
19399 4004 T420-BCH Unified Wire Ethernet Controller
19400 4005 T440-BCH Unified Wire Ethernet Controller
19401 4006 T440-CH Unified Wire Ethernet Controller
19402 4007 T420-SO Unified Wire Ethernet Controller
19403 4008 T420-CX Unified Wire Ethernet Controller
19404 4009 T420-BT Unified Wire Ethernet Controller
19405 400a T404-BT Unified Wire Ethernet Controller
[all …]
|
| /freebsd/sys/dev/cxgbe/firmware/ |
| H A D | t5fw_cfg_fpga.txt | 40 # this "Unified PF" will need to have enough resources allocated to it
43 # severely limit the TotalVFs if we continue to use PF0 as the Unified PF
44 # or we'll need to move the Unified PF into the PF4-7 range since those
57 # managed via a single Unified PF and we want to accommodate scaling up
64 # for a total of 96 Ingress Queues and MSI-X Vectors on the Unified PF.
184 # Breakdown of Virtual Interface/Queue/Interrupt resources for the "Unified
191 # Thus, the number of MSI-X Vectors assigned to the Unified PF will be less
252 # Adding all of the above Unified PF resource needs together: (NIC + OFLD +
262 # that up to 128 to make sure the Unified PF doesn't run out of resources.
284 # For PF4, the Unified PF, we give it an MSI-X Table Size as outlined above.
[all …]
|
| H A D | t4fw_cfg_uwire.txt | 40 # this "Unified PF" will need to have enough resources allocated to it
43 # severely limit the TotalVFs if we continue to use PF0 as the Unified PF
44 # or we'll need to move the Unified PF into the PF4-7 range since those
57 # managed via a single Unified PF and we want to accommodate scaling up
64 # for a total of 96 Ingress Queues and MSI-X Vectors on the Unified PF.
167 # Breakdown of Virtual Interface/Queue/Interrupt resources for the "Unified
174 # Thus, the number of MSI-X Vectors assigned to the Unified PF will be less
235 # Adding all of the above Unified PF resource needs together: (NIC + OFLD +
245 # that up to 128 to make sure the Unified PF doesn't run out of resources.
267 # For PF4, the Unified PF, we give it an MSI-X Table Size as outlined above.
[all …]
|
| /freebsd/crypto/openssl/Configurations/ |
| H A D | 00-base-templates.conf | 27 build_scheme => [ "unified", "unix" ],
82 build_scheme => [ "unified", "unix" ],
117 build_scheme => [ "unified", "windows" ],
137 build_scheme => [ "unified", "VMS" ],
|
| /freebsd/usr.bin/diff/ |
| H A D | diff.1 | 65 .Op Fl -unified
156 .Fl U Ar number | Fl -unified Ar number
191 .Op Fl -unified
319 .It Fl U Ar number Fl -unified Ar number
327 .Em unified
329 A unified diff is similar to the context diff produced by the
453 file name and time in the context or unified diff header.
455 With unified and context diffs, show with each change
462 normal, context or unified output formats.
739 recursively generating an unified dif
[all...] |
| /freebsd/sys/contrib/device-tree/src/arm64/amd/ |
| H A D | amd-seattle-cpus.dtsi | 169 cache-unified;
177 cache-unified;
185 cache-unified;
193 cache-unified;
202 cache-unified;
|
| H A D | elba-16core.dtsi | 76 cache-unified;
115 cache-unified;
154 cache-unified;
193 cache-unified;
|
| /freebsd/sys/contrib/device-tree/Bindings/riscv/ |
| H A D | sifive-l2-cache.txt | 22 - cache-unified: Specifies the cache is a unified cache
45 cache-unified;
|
| H A D | sifive-l2-cache.yaml | 56 cache-unified: true
126 - cache-unified
138 cache-unified;
|
| H A D | sifive,ccache0.yaml | 61 cache-unified: true
150 - cache-unified
162 cache-unified;
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | IntrinsicsNVVM.td | 2201 "llvm.nvvm.tex.unified.1d.v4f32.s32">;
2205 "llvm.nvvm.tex.unified.1d.v4f32.f32">;
2209 "llvm.nvvm.tex.unified.1d.level.v4f32.f32">;
2214 "llvm.nvvm.tex.unified.1d.grad.v4f32.f32">;
2218 "llvm.nvvm.tex.unified.1d.v4s32.s32">;
2222 "llvm.nvvm.tex.unified.1d.v4s32.f32">;
2226 "llvm.nvvm.tex.unified.1d.level.v4s32.f32">;
2231 "llvm.nvvm.tex.unified.1d.grad.v4s32.f32">;
2235 "llvm.nvvm.tex.unified.1d.v4u32.s32">;
2239 "llvm.nvvm.tex.unified.1d.v4u32.f32">;
[all …]
|
| /freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
| H A D | fsl-ls2088a.dtsi | 106 cache-unified;
112 cache-unified;
118 cache-unified;
124 cache-unified;
|
| H A D | fsl-ls2080a.dtsi | 106 cache-unified;
112 cache-unified;
118 cache-unified;
124 cache-unified;
|
| /freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
| H A D | sm4450.dtsi | 64 cache-unified;
70 cache-unified;
90 cache-unified;
110 cache-unified;
130 cache-unified;
150 cache-unified;
170 cache-unified;
190 cache-unified;
210 cache-unified;
|
| /freebsd/contrib/llvm-project/llvm/lib/Support/ |
| H A D | UnicodeNameToCodepoint.cpp | 325 {"CJK UNIFIED IDEOGRAPH-", 0x3400, 0x4DBF},
326 {"CJK UNIFIED IDEOGRAPH-", 0x4E00, 0x9FFF},
327 {"CJK UNIFIED IDEOGRAPH-", 0x20000, 0x2A6DF},
328 {"CJK UNIFIED IDEOGRAPH-", 0x2A700, 0x2B739},
329 {"CJK UNIFIED IDEOGRAPH-", 0x2B740, 0x2B81D},
330 {"CJK UNIFIED IDEOGRAPH-", 0x2B820, 0x2CEA1},
331 {"CJK UNIFIED IDEOGRAPH-", 0x2CEB0, 0x2EBE0},
332 {"CJK UNIFIED IDEOGRAPH-", 0x2EBF0, 0x2EE5D},
333 {"CJK UNIFIED IDEOGRAPH-", 0x30000, 0x3134A},
334 {"CJK UNIFIED IDEOGRAP
[all...] |
| /freebsd/sys/arm/include/ |
| H A D | sysreg.h | 189 #define CP15_TLBIALLIS p15, 0, r0, c8, c3, 0 /* Invalidate entire unified TLB IS */
190 #define CP15_TLBIMVAIS(rr) p15, 0, rr, c8, c3, 1 /* Invalidate unified TLB by MVA IS */
191 #define CP15_TLBIASIDIS(rr) p15, 0, rr, c8, c3, 2 /* Invalidate unified TLB by ASID IS */
192 #define CP15_TLBIMVAAIS(rr) p15, 0, rr, c8, c3, 3 /* Invalidate unified TLB by MVA, all ASID IS */
195 #define CP15_TLBIALL p15, 0, r0, c8, c7, 0 /* Invalidate entire unified TLB */
196 #define CP15_TLBIMVA(rr) p15, 0, rr, c8, c7, 1 /* Invalidate unified TLB by MVA */
197 #define CP15_TLBIASID(rr) p15, 0, rr, c8, c7, 2 /* Invalidate unified TLB by ASID */
199 #define CP15_TLBIALLH(rr) p15, 4, rr, c8, c7, 0 /* Invalidate Entire Hyp Unified TLB */
202 #define CP15_TLBIMVAA(rr) p15, 0, rr, c8, c7, 3 /* Invalidate unified TLB by MVA, all ASID */
|