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/linux/Documentation/devicetree/bindings/clock/
H A Dmaxim,max77686.txt11 (gated/ungated) over I2C. Clocks are defined as preprocessor macros in
16 (gated/ungated) over I2C. Clocks are defined as preprocessor macros in
20 (gated/ungated) over I2C. Clocks are defined as preprocessor macros in
/linux/drivers/clocksource/
H A Dingenic-ost.c156 /* _noirq: We want the OST clock to be gated last / ungated first */
H A Dingenic-timer.c410 /* _noirq: We want the TCU clocks to be gated last / ungated first */
/linux/Documentation/devicetree/bindings/mfd/
H A Dmaxim,max77802.yaml22 (gated/ungated) over I2C. The clock IDs are defined as preprocessor macros
/linux/drivers/clk/
H A Dclk-bulk.c222 * @clks: the clk_bulk_data table being ungated
H A Dclk.c1389 * @clk: the clk being ungated
/linux/include/dt-bindings/clock/
H A Dtegra234-clock.h370 /** @brief ungated version of fuse clk */
633 /** @brief ungated version of TX symbol clock after fixed 1/2 divider */
773 /** @brief CLK_RST_CONTROLLER_CLK_SOURCE_EQOS_TX_CLK divider ungated output */
/linux/drivers/pmdomain/imx/
H A Dimx8m-blk-ctrl.c425 * enable bits, but is ungated together with the VPU clocks. To in imx8mm_vpu_power_notifier()
814 * enable bits, but is ungated and reset together with the VPUs. The in imx8mq_vpu_power_notifier()
/linux/arch/arm/include/asm/
H A Dmcpm.h48 * from very early assembly code before the CPU is ungated. The
/linux/drivers/gpu/drm/tegra/
H A Dgr3d.c548 * be done safely in that case. Hence we will keep the power ungated in gr3d_runtime_suspend()
/linux/drivers/clk/bcm/
H A Dclk-iproc-pll.c223 /* certain PLLs also need to be ungated from the ASIU top level */ in __pll_enable()
/linux/drivers/clk/sunxi-ng/
H A Dccu-sun20i-d1.c231 * and has a special key field. The clock does not need to be ungated anyway.
/linux/drivers/mmc/host/
H A Dsdhci-msm.c2725 * restore the SDR DLL settings when the clock is ungated. in sdhci_msm_runtime_resume()
/linux/drivers/gpu/drm/i915/display/
H A Dintel_ddi.c2085 "[ENCODER:%d:%s] is disabled/in DSI mode with an ungated DDI clock, gate it\n", in intel_ddi_sanitize_encoder_pll_mapping()