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/freebsd/sys/contrib/xen/
H A Dxen.h30 #include "xen-compat.h"
33 #include "arch-x86/xen.h"
35 #include "arch-arm.h"
135 /* Architecture-specific hypercall definitions. */
157 /* New event-channel and physdev hypercalls introduced in 0x00030202. */
175 * In the side comments, 'V.' denotes a per-VCPU VIRQ while 'G.' denotes a
176 * global VIRQ. The former can be bound once per VCPU and cannot be re-bound.
178 * allocated to VCPU0 but can subsequently be re-bound.
195 /* Architecture-specific VIRQ definitions. */
223 * x != 0 => PFD == x - 1
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/freebsd/lib/librt/
H A Dsigev_thread.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
43 #include "un-namespace.h"
148 return (-1); in __sigev_check_init()
151 return (sigev_default_thread != NULL) ? 0 : -1; in __sigev_check_init()
197 sn->sn_value = evp->sigev_value; in __sigev_alloc()
198 sn->sn_func = evp->sigev_notify_function; in __sigev_alloc()
199 sn->sn_gen = atomic_fetch_add_explicit(&sigev_generation, 1, in __sigev_alloc()
201 sn->sn_type = type; in __sigev_alloc()
202 _pthread_attr_init(&sn->sn_attr); in __sigev_alloc()
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/freebsd/share/man/man4/
H A Dtermios.4190 returns -1 with
224 returns -1 with
238 full-duplex mode, so that data may arrive even while output is occurring.
271 This is useful for terminals that can operate in full-duplex mode.
291 .Bl -enum -offset indent
301 If there is no data available, the read returns -1, with
313 character, an end-of-file
315 character, or an end-of-line
357 This un-delimited
414 serves as an inter-byte timer and is activated after
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.h1 //===-- AMDGPUISelLowering.h - AMDGPU Lowering Interface --------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
13 //===----------------------------------------------------------------------===//
32 /// legalized from a smaller type VT. Need to match pre-legalized type because
39 /// unsigned integer. Truncating to this size and then zero-extending to the
44 /// signed integer. Truncating to this size and then sign-extending to the
141 /// Return 64-bit value Op as two 32-bit integers.
149 /// would otherwise be a 1-vector.
285 // (https://github.com/llvm/llvm-project/commit/db77e57ea86d941a4262ef60261692f4cb6893e6)
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/freebsd/lib/libthr/thread/
H A Dthr_sig.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
41 #include "un-namespace.h"
65 return (&_thr_sigact[signo - 1]); in __libc_sigaction_slot()
97 if (curthread->sigblock > 0) { in thr_signal_block_slow()
98 curthread->sigblock++; in thr_signal_block_slow()
101 __sys_sigprocmask(SIG_BLOCK, &_thr_maskset, &curthread->sigmask); in thr_signal_block_slow()
102 curthread->sigblock++; in thr_signal_block_slow()
108 if (--curthread->sigblock == 0) in thr_signal_unblock_slow()
109 __sys_sigprocmask(SIG_SETMASK, &curthread->sigmask, NULL); in thr_signal_unblock_slow()
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/freebsd/share/dict/
H A Dweb2a12 A-b-c book
13 A-b-c method
14 abdomino-uterotomy
15 Abdul-baha
16 a-be
20 able-bodied
21 able-bodiedness
22 able-minded
23 able-mindedness
27 Abor-miri
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMLowOverheadLoops.cpp1 //===-- ARMLowOverheadLoops.cpp - CodeGen Low-overhead Loops ---*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 /// Finalize v8.1-m low-overhead loops by converting the associated pseudo
12 /// - t2*LoopStart - placed in the preheader or pre-preheader. The do-loop
15 /// - t2LoopDec - placed within in the loop body.
16 /// - t2LoopEnd - the loop latch terminator.
19 /// which determines whether we can generated the tail-predicated low-overhead
23 /// Low-overhead loops are constructed and executed using a setup instruction:
40 /// "VPT Active" context (which includes low-overhead loops and vpt blocks).
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H A DARMISelDAGToDAG.cpp1 //===-- ARMISelDAGToDAG.cpp - A dag to dag inst selector for ARM ----------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
42 #define DEBUG_TYPE "arm-isel"
46 DisableShifterOp("disable-shifter-op", cl::Hidden,
47 cl::desc("Disable isel of shifter-op"),
50 //===--------------------------------------------------------------------===//
51 /// ARMDAGToDAGISel - ARM specific code to select ARM machine
57 /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
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/freebsd/contrib/ncurses/doc/
H A Dhackguide.doc22 + Translation of Non-use Capabilities
24 + Source-Form Translation
40 for character-cell terminals and terminal emulators with the following
42 * Source-compatible with historical curses implementations
46 * High-quality -- stable and reliable code, wide portability, good
48 * Featureful -- should eliminate as much of the drudgery of C
53 compatibility with older version must trump featurefulness -- we
59 We used System V curses as a model, reverse-engineering their API, in
68 with System V took us most of the way to base-level XSI conformance.
87 Code written for ncurses may assume an ANSI-standard C compiler and
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DLoopVectorize.cpp1 //===- LoopVectorize.cpp - A Loop Vectorizer ------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 // and generates target-independent LLVM-IR.
20 // 2. LoopVectorizationLegality - A unit that checks for the legality
22 // 3. InnerLoopVectorizer - A unit that performs the actual
24 // 4. LoopVectorizationCostModel - A unit that checks for the profitability
31 // http://lists.llvm.org/pipermail/llvm-dev/2017-December/119523.html). For this
32 // purpose, we temporarily introduced the VPlan-native vectorization path: an
36 //===----------------------------------------------------------------------===//
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H A DSLPVectorizer.cpp1 //===- SLPVectorizer.cpp - A bottom up SLP Vectorizer --------
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/freebsd/contrib/llvm-project/llvm/tools/bugpoint/
H A DMiscompilation.cpp1 //===- Miscompilation.cpp - Debug program miscompilations -----------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
38 "disable-loop-extraction",
42 "disable-block-extraction",
57 /// TestResult - After passes have been split into a test group and a control
74 BD.EmitProgressBitcode(BD.getProgram(), "pass-error", false); in doTest()
116 BD.EmitProgressBitcode(BD.getProgram(), "pass-error", false); in doTest()
161 BD.EmitProgressBitcode(BD.getProgram(), "pass-error", false); in doTest()
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/freebsd/sys/contrib/ncsw/Peripherals/QM/
H A Dfsl_qman.h3 � 1995-2003, 2004, 2005-2011 Freescale Semiconductor, Inc.
50 /* QMan s/w corenet portal, low-level i/face */
53 e_QmPortalPCI = 0, /* PI index, cache-inhibited */
54 e_QmPortalPCE, /* PI index, cache-enabled */
55 e_QmPortalPVB /* valid-bit */
59 e_QmPortalEqcrCCI = 0, /* CI index, cache-inhibited */
60 e_QmPortalEqcrCCE /* CI index, cache-enabled */
64 e_QmPortalDqrrCCI = 0, /* CI index, cache-inhibited */
65 e_QmPortalDqrrCCE, /* CI index, cache-enabled */
70 e_QmPortalMrCCI = 0, /* CI index, cache-inhibited */
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/freebsd/contrib/ncurses/doc/html/
H A Dhackguide.html1 <!--
4 * Copyright 2019-2020,2022 Thomas E. Dickey *
5 * Copyright 2000-2013,2017 Free Software Foundation, Inc. *
31 -->
32 <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01//EN">
38 <link rel="author" href="mailto:bugs-ncurses@gnu.org">
39 <meta http-equiv="Content-Type" content=
40 "text/html; charset=us-ascii"><!--
41 This document is self-contained, *except* that there is one relative link to
42 the ncurses-intro.html document, expected to be in the same directory with
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/AsmParser/
H A DRISCVAsmParser.cpp1 //===-- RISCVAsmParser.cpp - Parse RISC-V assembly to MCInst instructions -===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
47 #define DEBUG_TYPE "riscv-asm-parser"
50 "Number of RISC-V Compressed instructions emitted");
52 static cl::opt<bool> AddBuildAttributes("riscv-add-build-attributes",
142 // Helper to emit pseudo instruction "lla" used in PC-rel addressing.
145 // Helper to emit pseudo instruction "lga" used in GOT-rel addressing.
148 // Helper to emit pseudo instruction "la" used in GOT/PC-rel addressing.
151 // Helper to emit pseudo instruction "la.tls.ie" used in initial-exec TLS
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/freebsd/share/doc/IPv6/
H A DIMPLEMENTATION9 applicable to KAME-integrated *BSD releases, as we have certain amount
11 KAME-integrated *BSD releases.
23 1.4.1 Assignment of link-local, and special addresses
59 2.1 FreeBSD 2.2.x-RELEASE
62 2.4 FreeBSD 3.x-RELEASE
63 2.5 FreeBSD 4.x-RELEASE
68 3.2 IPv6-to-IPv4 header translator
79 4.8.2 draft-touch-ipsec-vpn approach
94 below (NOTE: this is not a complete list - this is too hard to maintain...).
110 * KAME-supplied route6d, bgpd and hroute6d support this.
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/freebsd/crypto/heimdal/lib/roken/
H A DChangeLog1 2008-07-12 Love Hörnquist Åstrand <lha@kth.se>
5 2008-04-27 Love Hörnquist Åstrand <lha@it.su.se>
7 * getaddrinfo-test.c: drop )
16 2008-04-26 Love Hörnquist Åstrand <lha@it.su.se>
20 2008-04-07 Love Hörnquist Åstrand <lha@it.su.se>
24 2008-02-23 Love Hörnquist Åstrand <lha@it.su.se>
28 2008-02-22 Love Hörnquist Åstrand <lha@it.su.se>
34 2008-01-12 Love Hörnquist Åstrand <lha@it.su.se>
38 2007-08-09 Love Hörnquist Åstrand <lha@it.su.se>
46 2007-07-17 Love Hörnquist Åstrand <lha@it.su.se>
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp1 //===- DAGCombiner.cpp - Implement a DAG node combiner --------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
16 //===----------------------------------------------------------------------===//
88 STATISTIC(PreIndexedNodes , "Number of pre-indexed nodes created");
89 STATISTIC(PostIndexedNodes, "Number of post-indexed nodes created");
99 CombinerGlobalAA("combiner-global-alias-analysis", cl::Hidden,
103 UseTBAA("combiner-use-tbaa", cl::Hidden, cl::init(true),
108 CombinerAAOnlyFunc("combiner-aa-only-func", cl::Hidden,
109 cl::desc("Only use DAG-combiner alias analysis in this"
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/freebsd/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h2 * Copyright (c) 2017-2018 Cavium, Inc.
78 …- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl…
79 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea…
80 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn…
81 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea…
88 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of …
90 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
116 … (0x1<<9) // Fast back-to-back transaction ena…
128 … (0x1<<23) // Fast back-to-back capable. Not ap…
145 …l has_io_bar=0. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
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/freebsd/contrib/sendmail/src/
H A DREADME1 # Copyright (c) 1998-2004 Proofpoint, Inc. and its suppliers.
3 # Copyright (c) 1983, 1995-1997 Eric P. Allman. All rights reserved.
35 +-------------------+
37 +-------------------+
51 -I or -L flags on the command line, e.g.,
53 sh ./Build -I/usr/sww/include -L/usr/sww/lib
56 site.config.m4 (or another file settable with the -f flag). This
60 confMAPDEF -D flags to specify database types to be included
62 confENVDEF -D flags to specify other environment information
63 confINCDIRS -I flags for finding include files during compilation
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Instrumentation/
H A DAddressSanitizer.cpp1 //===- AddressSanitizer.cpp - memory error detector -----------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
16 //===----------------------------------------------------------------------===//
194 // Command-line flags.
197 "asan-kernel", cl::desc("Enable KernelAddressSanitizer instrumentation"),
201 "asan-recover",
202 cl::desc("Enable recovery mode (continue-after-error)."),
206 "asan-guard-against-version-mismatch",
210 // This flag may need to be replaced with -f[no-]asan-reads.
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp1 //===-- AArch64ISelLowering.cpp - AArch64 DAG Lowering Implementation ----===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
109 #define DEBUG_TYPE "aarch64-lower"
119 "aarch64-elf-ldtls-generation", cl::Hidden,
124 EnableOptimizeLogicalImm("aarch64-enable-logical-imm", cl::Hidden,
134 EnableCombineMGatherIntrinsics("aarch64-enable-mgather-combine", cl::Hidden,
135 cl::desc("Combine extends of AArch64 masked "
139 static cl::opt<bool> EnableExtToTBL("aarch64-enable-ext-to-tbl", cl::Hidden,
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp1 //===-- PPCISelDAGToDAG.cpp - PPC --pattern matching inst selector --------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
72 #define DEBUG_TYPE "ppc-isel"
73 #define PASS_NAME "PowerPC DAG->DAG Pattern Instruction Selection"
86 "Number of compares not eliminated as they have non-extending uses.");
91 cl::opt<bool> ANDIGlueBug("expose-ppc-andi-glue-bug",
95 UseBitPermRewriter("ppc-use-bit-perm-rewriter", cl::init(true),
99 "ppc-bit-perm-rewriter-stress-rotates",
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/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DDebugInfoMetadata.h1 //===- llvm/IR/DebugInfoMetadata.h - Debug info metadata --------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
84 MDTuple *operator->() const { return get(); }
88 unsigned size() const { return N ? N->getNumOperands() : 0u; } in size()
90 return cast_or_null<DIType>(N->getOperand(I));
124 iterator begin() const { return N ? iterator(N->op_begin()) : iterator(); } in begin()
125 iterator end() const { return N ? iterator(N->op_end()) : iterator(); } in end()
128 /// Tagged DWARF-like metadata node.
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineVerifier.cpp1 //===- MachineVerifier.cpp - Machine Code Verifier ------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
19 // The machine code verifier is enabled with the command-line option
20 // -verify-machineinstrs.
21 //===----------------------------------------------------------------------===//
144 // Add Reg and any sub-registers to RV
148 append_range(RV, TRI->subregs(Reg.asMCReg())); in addRegWithSubRegs()
207 // Live-out registers are either in regsLiveOut or vregsPassed.
221 return Reg.id() < TRI->getNumRegs() && TRI->isInAllocatableClass(Reg) && in isAllocatable()
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