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/freebsd/sys/contrib/alpine-hal/
H A Dal_hal_udma_debug.c50 static void al_udma_regs_m2s_axi_print(struct al_udma *udma) in al_udma_regs_m2s_axi_print() argument
53 AL_UDMA_PRINT_REG(udma, " ", "\n", m2s, axi_m2s, comp_wr_cfg_1); in al_udma_regs_m2s_axi_print()
54 AL_UDMA_PRINT_REG(udma, " ", "\n", m2s, axi_m2s, comp_wr_cfg_2); in al_udma_regs_m2s_axi_print()
55 AL_UDMA_PRINT_REG(udma, " ", "\n", m2s, axi_m2s, data_rd_cfg_1); in al_udma_regs_m2s_axi_print()
56 AL_UDMA_PRINT_REG(udma, " ", "\n", m2s, axi_m2s, data_rd_cfg_2); in al_udma_regs_m2s_axi_print()
57 AL_UDMA_PRINT_REG(udma, " ", "\n", m2s, axi_m2s, desc_rd_cfg_1); in al_udma_regs_m2s_axi_print()
58 AL_UDMA_PRINT_REG(udma, " ", "\n", m2s, axi_m2s, desc_rd_cfg_2); in al_udma_regs_m2s_axi_print()
59 AL_UDMA_PRINT_REG(udma, " ", "\n", m2s, axi_m2s, data_rd_cfg); in al_udma_regs_m2s_axi_print()
60 AL_UDMA_PRINT_REG(udma, " ", "\n", m2s, axi_m2s, desc_rd_cfg_3); in al_udma_regs_m2s_axi_print()
62 AL_UDMA_PRINT_REG(udma, " ", "\n", m2s, axi_m2s, desc_wr_cfg_1); in al_udma_regs_m2s_axi_print()
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H A Dal_hal_udma_config.c92 /* Configure UDMA AXI M2S configuration */
135 /** Configure UDMA AXI M2S configuration */
136 int al_udma_m2s_axi_set(struct al_udma *udma, in al_udma_m2s_axi_set() argument
142 &udma->udma_regs->m2s.axi_m2s.comp_wr_cfg_1, in al_udma_m2s_axi_set()
143 &udma->udma_regs->m2s.axi_m2s.comp_wr_cfg_2, in al_udma_m2s_axi_set()
144 &udma->udma_regs->m2s.axi_m2s.desc_wr_cfg_1); in al_udma_m2s_axi_set()
147 &udma->udma_regs->m2s.axi_m2s.data_rd_cfg_1, in al_udma_m2s_axi_set()
148 &udma->udma_regs->m2s.axi_m2s.data_rd_cfg_2, in al_udma_m2s_axi_set()
149 &udma->udma_regs->m2s.axi_m2s.data_rd_cfg); in al_udma_m2s_axi_set()
152 &udma->udma_regs->m2s.axi_m2s.desc_rd_cfg_1, in al_udma_m2s_axi_set()
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H A Dal_hal_udma_main.c71 static void al_udma_set_defaults(struct al_udma *udma) in al_udma_set_defaults() argument
73 uint8_t rev_id = udma->rev_id; in al_udma_set_defaults()
75 if (udma->type == UDMA_TX) { in al_udma_set_defaults()
77 (struct unit_regs*)udma->udma_regs; in al_udma_set_defaults()
80 * This allows the UDMA to have 16 outstanding writes */ in al_udma_set_defaults()
93 if (udma->type == UDMA_RX) { in al_udma_set_defaults()
95 &udma->udma_regs->s2m.s2m_comp.cfg_application_ack, 0); in al_udma_set_defaults()
103 * @param udma_q udma queue data structure
112 if (udma_q->udma->type == UDMA_TX) { in al_udma_q_config()
126 * @param udma_q udma queue data structure
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H A Dal_hal_udma_config.h37 * @defgroup group_udma_config UDMA Config
39 * UDMA Config API
77 /** UDMA AXI M2S configuration */
89 /** UDMA AXI M2S configuration */
102 /** UDMA AXI S2M configuration */
222 /** M2S UDMA DWRR configuration */
255 /** M2S UDMA Q scheduling configuration */
266 /** M2S UDMA / UDMA Q scheduling configuration */
272 /** UDMA / UDMA Q rate limitation configuration */
281 /** UDMA Data read configuration */
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H A Dal_hal_udma_debug.h38 * @defgroup group_udma_debug UDMA Debug
40 * UDMA Debug
59 /* UDMA register print helper macros */
60 #define AL_UDMA_PRINT_REG(UDMA, PREFIX, POSTFIX, TYPE, GROUP, REG) \ argument
62 &(UDMA->udma_regs->TYPE.GROUP.REG)))
65 UDMA, PREFIX, POSTFIX, FMT, TYPE, GROUP, REG, LBL, FIELD) \
67 &(UDMA->udma_regs->TYPE.GROUP.REG)) \
71 UDMA, PREFIX, POSTFIX, TYPE, GROUP, REG, LBL, FIELD) \
73 &(UDMA->udma_regs->TYPE.GROUP.REG)) \
76 /* UDMA register print mask definitions */
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H A Dal_hal_udma.h40 * UDMA API
44 * @defgroup group_udma_main UDMA Main
46 * UDMA main API
80 /** UDMA submission descriptor */
135 /** UDMA completion descriptor */
171 * Requires Target-ID in descriptor to be enabled for the specific UDMA
177 /** UDMA type */
183 /** UDMA state */
194 /** UDMA Q specific parameters from upper layer */
225 /** UDMA parameters from upper layer */
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H A Dal_hal_udma_iofic.h38 * @defgroup group_udma_interrupts UDMA I/O Fabric Interrupt Controller
40 * UDMA IOFIC API
45 * in UDMA based units. These APIs rely and use some the Interrupt controller
70 AL_IOFIC_MODE_MSIX_PER_Q, /**< per UDMA queue MSI-X interrupt */
129 * two cause registers (group A and group B) that covers UDMA M2S/S2M errors.
169 * could indicate a software bug or hardware failure, unless the UDMA is
171 * used to configure the UDMA to ignore the Ring ID check)
305 * (between the application and the UDMA) when the interface is not in the
314 * (between the application and the UDMA) when the interface is in the middle
315 * of packet, meaning that there was a 'first' indication before and the UDMA
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H A Dal_hal_udma_regs.h41 * @brief udma registers definition
60 /** UDMA registers, either m2s or s2m */
74 /** UDMA submission and completion registers, M2S and S2M UDMAs have same stucture */
104 /** @} end of UDMA group */
H A Dal_hal_udma_iofic_regs.h46 /** This structure covers all interrupt registers of a given UDMA, which is
49 * application-specific engine attached to the UDMA, the interrupt summary
H A Dal_hal_udma_iofic.c115 * configure the UDMA interrupt registers, interrupts are kept masked
151 /** @} end of UDMA group */
/freebsd/sys/contrib/device-tree/Bindings/dma/ti/
H A Dk3-udma.yaml6 $id: http://devicetree.org/schemas/dma/ti/k3-udma.yaml#
15 The UDMA-P is intended to perform similar (but significantly upgraded)
16 functions as the packet-oriented DMA used on previous SoC devices. The UDMA-P
18 The UDMA-P architecture facilitates the segmentation and reassembly of SoC DMA
31 The UDMA-P also supports acting as both a UTC and UDMA-C for its internal
32 channels. Channels in the UDMA-P can be configured to be either Packet-Based
37 The peripherals serviced by UDMA can be PSI-L native (sa2ul, cpsw, etc) or
74 - description: UDMA-P Control /Status Registers region
99 Array of UDMA tcha
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/freebsd/sys/contrib/device-tree/Bindings/ata/
H A Dpata-arasan.txt21 - arasan,broken-udma: if present, UDMA mode is unusable
25 required unless both UDMA and MWDMA mode are broken
/freebsd/sys/contrib/alpine-hal/eth/
H A Dal_hal_eth.h274 uint8_t prio_q_map[4][8]; /**< for each UDMA, defines the mapping between
279 * and 3 of UDMA 1 will be stopped when pause
281 * 2 and 3 of UDMA 1 become almost full, then
288 * 2) queues of unused UDMA must be treated as above.
343 * Requires Target-ID in descriptor to be enabled for the specific UDMA
387 * Requires Target-ID in descriptor to be enabled for the specific UDMA
414 uint8_t udma_id; /**< the id of the UDMA used by this adapter */
447 uint8_t udma_id; /**< the id of the UDMA used by this adapter */
449 void __iomem *udma_regs_base; /**< UDMA register base address */
465 * - initialize the Tx and Rx UDMA
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H A Dal_hal_eth_main.c348 * change and wait udma state
350 * @param dma the udma to change its state
565 al_dbg("eth [%s]: initialize controller's UDMA. id = %d\n", params->name, params->udma_id); in al_eth_adapter_init()
566 al_dbg("eth [%s]: UDMA base regs: %p\n", params->name, params->udma_regs_base); in al_eth_adapter_init()
584 /* initialize Tx udma */ in al_eth_adapter_init()
602 /* initialize Rx udma */ in al_eth_adapter_init()
621 al_dbg("eth [%s]: controller's UDMA successfully initialized\n", in al_eth_adapter_init()
641 /* if pointer to ec regs provided, then init the tx meta cache of this udma*/ in al_eth_adapter_init()
652 // only udma 0 allowed to init ec in al_eth_adapter_init()
723 // only udma 0 allowed to init ec in al_eth_ec_mac_ints_config()
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H A Dal_hal_eth_ec_regs.h291 /* [0x0] Per UDMA default configuration */
364 /* [0x4] UDMA MAC SA information for spoofing */
366 /* [0x8] UDMA MAC SA information for spoofing */
468 /* [0x40] Mask of "pause_on" [7:0] for the UDMA stream inter ... */
1578 /* Override filter decision and forward to default UDMA/queue;dr ... */
1580 /* Override filter decision and forward to default UDMA/queue;Dr ... */
1582 /* Override filter decision and forward to default UDMA/queue;Dr ... */
1584 /* Override filter decision and forward to default UDMA/queue;Dr ... */
1586 /* Override filter decision and forward to default UDMA/queue;Dr ... */
1588 /* Override filter decision and forward to default UDMA/queue;Dr ... */
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/freebsd/sys/dev/ata/chipsets/
H A Data-ite.c147 /* enable UDMA mode */ in ata_ite_821x_setmode()
151 /* set UDMA timing */ in ata_ite_821x_setmode()
157 /* disable UDMA mode */ in ata_ite_821x_setmode()
195 /* Enable/disable UDMA and set timings. */ in ata_ite_8213_setmode()
207 /* Set UDMA reference clock (33/66/133MHz). */ in ata_ite_8213_setmode()
H A Data-acerlabs.c141 /* enable cable detection and UDMA support on revisions < 0xc7 */ in ata_ali_chipinit()
146 /* enable ATAPI UDMA mode (even if we are going to do PIO) */ in ata_ali_chipinit()
162 /* deactivate the ATAPI FIFO and enable ATAPI UDMA */ in ata_ali_chipinit()
301 static const uint8_t udma[] = {0x0c, 0x0b, 0x0a, 0x09, 0x08, 0x0f, in ata_ali_setmode() local
325 /* Set UDMA mode */ in ata_ali_setmode()
329 word54 |= (((udma[mode&ATA_MODE_MASK]<<16)|0x05)<<(devno<<2)); in ata_ali_setmode()
H A Data-ati.c218 /* Set UDMA mode, enable UDMA, set WDMA2/PIO4 */ in ata_ati_setmode()
232 /* Disable UDMA, set WDMA mode and timings, calculate PIO. */ in ata_ati_setmode()
243 /* Disable UDMA, set requested PIO. */ in ata_ati_setmode()
H A Data-serverworks.c325 /* Set UDMA mode, enable UDMA, set WDMA2/PIO4 */ in ata_serverworks_setmode()
339 /* Disable UDMA, set WDMA mode and timings, calculate PIO. */ in ata_serverworks_setmode()
350 /* Disable UDMA, set requested PIO. */ in ata_serverworks_setmode()
H A Data-cyrix.c113 /* Set UDMA timings, and PIO4. */ in ata_cyrix_setmode()
/freebsd/sys/powerpc/powermac/
H A Data_macio.c103 { 120, 180 }, /* UDMA 0 */
104 { 90, 150 }, /* UDMA 1 */
105 { 60, 120 }, /* UDMA 2 */
106 { 45, 90 }, /* UDMA 3 */
107 { 30, 90 } /* UDMA 4 */
/freebsd/sys/dev/isci/scil/
H A Dscic_sds_stp_request.h81 U32 udma; member
152 * a SATA/STP UDMA protocol operation.
/freebsd/sys/contrib/device-tree/Bindings/soc/ti/
H A Dk3-ringacc.txt32 -- ti,dma-ring-reset-quirk : enable ringacc / udma ring state interoperability
/freebsd/sys/powerpc/mpc85xx/
H A Dfsl_sata.h54 #define ATA_E_ICRC 0x80 /* UDMA crc error */
/freebsd/sys/dev/al_eth/
H A Dal_eth.c685 uint8_t udma, uint32_t queue) in al_eth_set_thash_table_entry() argument
688 if (udma != 0) in al_eth_set_thash_table_entry()
694 al_eth_thash_table_set(&adapter->hal_adapter, idx, udma, queue); in al_eth_set_thash_table_entry()
748 params->udma_regs_base = adapter->udma_base; /* UDMA register base address */ in al_eth_hw_init_adapter()
761 /* in pcie NIC mode, force eth UDMA to access PCIE0 using the vmid */ in al_eth_hw_init_adapter()
1877 * wait till pending rx packets written and UDMA becomes idle, in al_eth_hw_stop()
1879 * UDMA to write to the memory in al_eth_hw_stop()
2357 /* size in bytes of the udma completion ring descriptor */ in al_eth_setup_tx_resources()
2471 /* size in bytes of the udma completion ring descriptor */ in al_eth_setup_rx_resources()
2745 "udma doesn't support single MSI-X mode yet.\n"); in al_eth_configure_int_mode()

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