| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn20/ |
| H A D | dcn20_dccg.h | 116 #define DCCG_REG_FIELD_LIST(type) \ argument
117 type DPPCLK0_DTO_PHASE;\
118 type DPPCLK0_DTO_MODULO;\
119 type DPPCLK_DTO_ENABLE[6];\
120 type DPPCLK_DTO_DB_EN[6];\
121 type REFCLK_CLOCK_EN;\
122 type REFCLK_SRC_SEL;\
123 type DISPCLK_STEP_DELAY;\
124 type DISPCLK_STEP_SIZE;\
125 type DISPCLK_FREQ_RAMP_DONE;\
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| /linux/drivers/gpu/drm/amd/display/dc/dpp/dcn10/ |
| H A D | dcn10_dpp.h | 479 #define TF_REG_FIELD_LIST(type) \ argument
480 type EXT_OVERSCAN_LEFT; \
481 type EXT_OVERSCAN_RIGHT; \
482 type EXT_OVERSCAN_BOTTOM; \
483 type EXT_OVERSCAN_TOP; \
484 type OTG_H_BLANK_START; \
485 type OTG_H_BLANK_END; \
486 type OTG_V_BLANK_START; \
487 type OTG_V_BLANK_END; \
488 type PIXEL_DEPTH; \
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| /linux/drivers/gpu/drm/amd/display/dc/dio/dcn10/ |
| H A D | dcn10_link_encoder.h | 228 #define DCN_LINK_ENCODER_REG_FIELD_LIST(type) \ argument
229 type DIG_ENABLE;\
230 type DIG_HPD_SELECT;\
231 type DIG_MODE;\
232 type DIG_FE_SOURCE_SELECT;\
233 type DIG_CLOCK_PATTERN;\
234 type DPHY_BYPASS;\
235 type DPHY_ATEST_SEL_LANE0;\
236 type DPHY_ATEST_SEL_LANE1;\
237 type DPHY_ATEST_SEL_LANE2;\
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| H A D | dcn10_stream_encoder.h | 355 #define SE_REG_FIELD_LIST_DCN1_0(type) \ argument
356 type AFMT_GENERIC_INDEX;\
357 type AFMT_GENERIC_HB0;\
358 type AFMT_GENERIC_HB1;\
359 type AFMT_GENERIC_HB2;\
360 type AFMT_GENERIC_HB3;\
361 type AFMT_GENERIC_LOCK_STATUS;\
362 type AFMT_GENERIC_CONFLICT;\
363 type AFMT_GENERIC_CONFLICT_CLR;\
364 type AFMT_GENERIC0_FRAME_UPDATE_PENDING;\
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| /linux/drivers/gpu/drm/amd/display/dc/optc/dcn10/ |
| H A D | dcn10_optc.h | 369 #define TG_REG_FIELD_LIST_DCN1_0(type) \ argument
370 type VSTARTUP_START;\
371 type VUPDATE_OFFSET;\
372 type VUPDATE_WIDTH;\
373 type VREADY_OFFSET;\
374 type OTG_BLANK_DATA_EN;\
375 type OTG_BLANK_DE_MODE;\
376 type OTG_CURRENT_BLANK_STATE;\
377 type OTG_MASTER_UPDATE_LOCK;\
378 type UPDATE_LOCK_STATUS;\
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| /linux/drivers/gpu/drm/amd/display/dc/dwb/dcn30/ |
| H A D | dcn30_dwb.h | 409 #define DWBC_REG_FIELD_LIST_DCN3_0(type) \ argument
410 type DWB_ENABLE;\
411 type DISPCLK_R_DWB_GATE_DIS;\
412 type DISPCLK_G_DWB_GATE_DIS;\
413 type DWB_TEST_CLK_SEL;\
414 type DWBSCL_LUT_MEM_PWR_FORCE;\
415 type DWBSCL_LUT_MEM_PWR_DIS;\
416 type DWBSCL_LUT_MEM_PWR_STATE;\
417 type DWBSCL_LB_MEM_PWR_FORCE;\
418 type DWBSCL_LB_MEM_PWR_DIS;\
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| /linux/drivers/gpu/drm/amd/display/dc/dsc/dcn20/ |
| H A D | dcn20_dsc.h | 269 #define DSC_FIELD_LIST_DCN20(type)\ argument
270 type DSC_CLOCK_EN; \
271 type DSC_DISPCLK_R_GATE_DIS; \
272 type DSC_DSCCLK_R_GATE_DIS; \
273 type DSC_DBG_EN; \
274 type DSC_TEST_CLOCK_MUX_SEL; \
275 type ICH_RESET_AT_END_OF_LINE; \
276 type NUMBER_OF_SLICES_PER_LINE; \
277 type ALTERNATE_ICH_ENCODING_EN; \
278 type NUMBER_OF_SLICES_IN_VERTICAL_DIRECTION; \
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| /linux/drivers/gpu/drm/amd/display/dc/mmhubbub/dcn20/ |
| H A D | dcn20_mmhubbub.h | 252 #define MCIF_WB_REG_FIELD_LIST_DCN2_0(type) \ argument
253 type MCIF_WB_BUFMGR_ENABLE;\
254 type MCIF_WB_BUFMGR_SW_INT_EN;\
255 type MCIF_WB_BUFMGR_SW_INT_ACK;\
256 type MCIF_WB_BUFMGR_SW_SLICE_INT_EN;\
257 type MCIF_WB_BUFMGR_SW_OVERRUN_INT_EN;\
258 type MCIF_WB_BUFMGR_SW_LOCK;\
259 type MCIF_WB_P_VMID;\
260 type MCIF_WB_BUF_ADDR_FENCE_EN;\
261 type MCIF_WB_BUFMGR_CUR_LINE_R;\
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| /linux/drivers/gpu/drm/msm/registers/display/ |
| H A D | dsi.xml | 76 <bitfield name="CMD_DMA_DONE" pos="0" type="boolean"/>
77 <bitfield name="MASK_CMD_DMA_DONE" pos="1" type="boolean"/>
78 <bitfield name="CMD_MDP_DONE" pos="8" type="boolean"/>
79 <bitfield name="MASK_CMD_MDP_DONE" pos="9" type="boolean"/>
80 <bitfield name="VIDEO_DONE" pos="16" type="boolean"/>
81 <bitfield name="MASK_VIDEO_DONE" pos="17" type="boolean"/>
82 <bitfield name="BTA_DONE" pos="20" type="boolean"/>
83 <bitfield name="MASK_BTA_DONE" pos="21" type="boolean"/>
84 <bitfield name="ERROR" pos="24" type="boolean"/>
85 <bitfield name="MASK_ERROR" pos="25" type="boolean"/>
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| /linux/Documentation/netlink/specs/ |
| H A D | ethtool.yaml | 12 name: udp-tunnel-type
14 type: enum
16 enum-cnt-name: __ethtool-udp-tunnel-type-cnt
20 type: enum
25 type: flags
40 type: enum
59 type: enum
91 name: phy-upstream-type
93 type: enum
97 type: enum
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| H A D | ovs_flow.yaml | 14 type: struct
20 type: u32
26 type: struct
30 type: u64
34 type: u64
38 type: struct
42 type: binary
47 type: binary
52 type: struct
56 type: u32
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| H A D | nftables.yaml | 13 type: struct
17 type: u8
20 type: u8
24 type: u16
27 type: enum
67 type: enum
74 type: enum
83 name: object-type
84 type: enum
99 type: flags
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| /linux/drivers/gpu/drm/amd/display/dc/hubp/dcn10/ |
| H A D | dcn10_hubp.h | 457 #define DCN_HUBP_REG_FIELD_BASE_LIST(type) \ argument
458 type HUBP_BLANK_EN;\
459 type HUBP_DISABLE;\
460 type HUBP_TTU_DISABLE;\
461 type HUBP_NO_OUTSTANDING_REQ;\
462 type HUBP_VTG_SEL;\
463 type HUBP_UNDERFLOW_STATUS;\
464 type HUBP_UNDERFLOW_CLEAR;\
465 type HUBP_IN_BLANK;\
466 type NUM_PIPES;\
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| /linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_dwb.h | 202 #define DWBC_REG_FIELD_LIST_DCN2_0(type) \ argument
203 type WB_ENABLE;\
204 type DISPCLK_R_WB_GATE_DIS;\
205 type DISPCLK_G_WB_GATE_DIS;\
206 type DISPCLK_G_WBSCL_GATE_DIS;\
207 type WB_TEST_CLK_SEL;\
208 type WB_LB_LS_DIS;\
209 type WB_LB_SD_DIS;\
210 type WB_LUT_LS_DIS;\
211 type WBSCL_LB_MEM_PWR_MODE_SEL;\
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| /linux/Documentation/userspace-api/media/ |
| H A D | videodev2.h.rst.exceptions | 20 replace symbol V4L2_FIELD_ALTERNATE :c:type:`v4l2_field`
21 replace symbol V4L2_FIELD_ANY :c:type:`v4l2_field`
22 replace symbol V4L2_FIELD_BOTTOM :c:type:`v4l2_field`
23 replace symbol V4L2_FIELD_INTERLACED :c:type:`v4l2_field`
24 replace symbol V4L2_FIELD_INTERLACED_BT :c:type:`v4l2_field`
25 replace symbol V4L2_FIELD_INTERLACED_TB :c:type:`v4l2_field`
26 replace symbol V4L2_FIELD_NONE :c:type:`v4l2_field`
27 replace symbol V4L2_FIELD_SEQ_BT :c:type:`v4l2_field`
28 replace symbol V4L2_FIELD_SEQ_TB :c:type:`v4l2_field`
29 replace symbol V4L2_FIELD_TOP :c:type:`v4l2_field`
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| H A D | conf_nitpick.py | 49 ("c:type", "atomic_t"),
50 ("c:type", "bool"),
51 ("c:type", "boolean"),
52 ("c:type", "buf_queue"),
53 ("c:type", "device"),
54 ("c:type", "device_driver"),
55 ("c:type", "device_node"),
56 ("c:type", "enum"),
57 ("c:type", "fd"),
58 ("c:type", "fd_set"),
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| /linux/drivers/gpu/drm/amd/display/dc/dpp/dcn401/ |
| H A D | dcn401_dpp.h | 382 #define DPP_REG_FIELD_LIST_DCN401(type) \ argument
383 DPP_REG_FIELD_LIST_DCN3(type); \
384 type CUR0_FP_BIAS_G_Y; \
385 type CUR0_FP_SCALE_G_Y; \
386 type CUR0_FP_BIAS_RB_CRCB; \
387 type CUR0_FP_SCALE_RB_CRCB; \
388 type CUR0_MATRIX_MODE; \
389 type CUR0_MATRIX_MODE_CURRENT; \
390 type CUR0_MATRIX_COEF_FORMAT; \
391 type CUR0_MATRIX_C11_A; \
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| /linux/drivers/net/ethernet/microchip/vcap/ |
| H A D | vcap_model_kunit.c | 19 .type = VCAP_FIELD_U32,
24 .type = VCAP_FIELD_BIT,
29 .type = VCAP_FIELD_U32,
34 .type = VCAP_FIELD_U32,
39 .type = VCAP_FIELD_U32,
44 .type = VCAP_FIELD_U32,
49 .type = VCAP_FIELD_BIT,
54 .type = VCAP_FIELD_U32,
59 .type = VCAP_FIELD_U32,
64 .type = VCAP_FIELD_U32,
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| /linux/tools/testing/selftests/drivers/net/netdevsim/ |
| H A D | hw_stats_l3.sh | 85 local type=$1; shift
89 echo $ifindex > $(DEBUGFS_DIR $instance)/hwstats/$type/$action
127 $IP link add name dummy1 type dummy
147 local type=$1; shift
156 local type=$1; shift
158 [[ $(netdev_hwstats_used $netdev $type) == "true" ]]
164 local type=$1; shift
166 [[ $(netdev_hwstats_used $netdev $type) == "false" ]]
172 local type=$1; shift
175 jq ".[].info.${type}_stats.request"
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| /linux/drivers/net/ethernet/microchip/sparx5/ |
| H A D | sparx5_vcap_ag_api.c | 19 .type = VCAP_FIELD_BIT,
24 .type = VCAP_FIELD_BIT,
29 .type = VCAP_FIELD_U32,
34 .type = VCAP_FIELD_U32,
39 .type = VCAP_FIELD_U32,
44 .type = VCAP_FIELD_U72,
49 .type = VCAP_FIELD_BIT,
54 .type = VCAP_FIELD_BIT,
59 .type = VCAP_FIELD_U32,
64 .type = VCAP_FIELD_U32,
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| /linux/drivers/net/ethernet/microchip/sparx5/lan969x/ |
| H A D | lan969x_vcap_ag_api.c | 18 .type = VCAP_FIELD_BIT,
23 .type = VCAP_FIELD_BIT,
28 .type = VCAP_FIELD_U32,
33 .type = VCAP_FIELD_U32,
38 .type = VCAP_FIELD_U32,
43 .type = VCAP_FIELD_U72,
48 .type = VCAP_FIELD_BIT,
53 .type = VCAP_FIELD_BIT,
58 .type = VCAP_FIELD_U32,
63 .type = VCAP_FIELD_U32,
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| /linux/drivers/gpu/drm/amd/display/dc/hubp/dcn20/ |
| H A D | dcn20_hubp.h | 181 #define DCN2_HUBP_REG_FIELD_VARIABLE_LIST(type) \ argument
182 DCN_HUBP_REG_FIELD_BASE_LIST(type); \
183 type DMDATA_ADDRESS_HIGH;\
184 type DMDATA_MODE;\
185 type DMDATA_UPDATED;\
186 type DMDATA_REPEAT;\
187 type DMDATA_SIZE;\
188 type DMDATA_SW_UPDATED;\
189 type DMDATA_SW_REPEAT;\
190 type DMDATA_SW_SIZE;\
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| /linux/Documentation/netlink/ |
| H A D | genetlink.yaml | 10 type: integer
13 type: [ string, integer ]
17 # literal int or limit based on fixed-width type e.g. u8-min, u16-max, etc.
18 type: [ string, integer ]
25 type: object
31 type: string
33 type: string
39 type: string
42 description: List of type and constant definitions (enums, flags, defines).
43 type: array
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| /linux/arch/riscv/include/asm/ |
| H A D | gdb_xml.h | 26 "<reg name=\""DBG_REG_ZERO"\" bitsize=\"64\" type=\"int\" regnum=\"0\"/>"
27 "<reg name=\""DBG_REG_RA"\" bitsize=\"64\" type=\"code_ptr\"/>"
28 "<reg name=\""DBG_REG_SP"\" bitsize=\"64\" type=\"data_ptr\"/>"
29 "<reg name=\""DBG_REG_GP"\" bitsize=\"64\" type=\"data_ptr\"/>"
30 "<reg name=\""DBG_REG_TP"\" bitsize=\"64\" type=\"data_ptr\"/>"
31 "<reg name=\""DBG_REG_T0"\" bitsize=\"64\" type=\"int\"/>"
32 "<reg name=\""DBG_REG_T1"\" bitsize=\"64\" type=\"int\"/>"
33 "<reg name=\""DBG_REG_T2"\" bitsize=\"64\" type=\"int\"/>"
34 "<reg name=\""DBG_REG_FP"\" bitsize=\"64\" type=\"data_ptr\"/>"
35 "<reg name=\""DBG_REG_S1"\" bitsize=\"64\" type=\"int\"/>"
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| /linux/drivers/net/ethernet/microchip/lan966x/ |
| H A D | lan966x_vcap_ag_api.c | 11 .type = VCAP_FIELD_BIT,
16 .type = VCAP_FIELD_U32,
21 .type = VCAP_FIELD_U32,
26 .type = VCAP_FIELD_BIT,
31 .type = VCAP_FIELD_BIT,
36 .type = VCAP_FIELD_BIT,
41 .type = VCAP_FIELD_BIT,
46 .type = VCAP_FIELD_BIT,
51 .type = VCAP_FIELD_BIT,
56 .type = VCAP_FIELD_BIT,
[all …]
|