/freebsd/sys/contrib/device-tree/Bindings/firmware/ |
H A D | fsl,scu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Dong Aisheng <aisheng.dong@nxp.com> 13 The System Controller Firmware (SCFW) is a low-level system function 14 which runs on a dedicated Cortex-M core to provide power, clock, and 17 The AP communicates with the SC using a multi-ported MU module found 26 const: fsl,imx-scu 28 clock-controller: 31 $ref: /schemas/clock/fsl,scu-clk.yaml [all …]
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/freebsd/sys/contrib/device-tree/Bindings/net/can/ |
H A D | nxp,sja1000.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Wolfgang Grandegger <wg@grandegger.com> 15 - enum: 16 - nxp,sja1000 17 - technologic,sja1000 18 - items: 19 - enum: 20 - renesas,r9a06g032-sja1000 # RZ/N1D [all …]
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H A D | sja1000.txt | 5 - compatible : should be one of "nxp,sja1000", "technologic,sja1000". 7 - reg : should specify the chip select, address offset and size required 10 - interrupts: property with a value describing the interrupt source 15 - reg-io-width : Specify the size (in bytes) of the IO accesses that 16 should be performed on the device. Valid value is 1, 2 or 4. 18 Default to 1 (8 bits). 20 - nxp,external-clock-frequency : Frequency of the external oscillator 25 - nxp,tx-output-mode : operation mode of the TX output control logic: 26 <0x0> : bi-phase output mode 31 - nxp,tx-output-config : TX output pin configuration: [all …]
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/freebsd/sys/contrib/device-tree/Bindings/media/ |
H A D | amphion,vpu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Min [all...] |
/freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
H A D | imx8-ss-vpu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 8 #address-cells = <1>; 9 #size-cells = <1>; 12 power-domains = <&pd IMX_SC_R_VPU>; 16 compatible = "fsl,imx6sx-mu"; 19 #mbox-cells = <2>; 20 power-domains = <&pd IMX_SC_R_VPU_MU_0>; 25 compatible = "fsl,imx6sx-mu"; 28 #mbox-cells = <2>; 29 power-domains = <&pd IMX_SC_R_VPU_MU_1>; [all …]
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H A D | imx8dxl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/clock/imx8-clock.h> 7 #include <dt-bindings/firmware/imx/rsrc.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gi [all...] |
H A D | imx8qm.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright 2018-2019 NXP 7 #include <dt-bindings/clock/imx8-lpcg.h> 8 #include <dt-bindings/firmware/imx/rsrc.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controlle [all...] |
H A D | imx8qxp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 4 * Copyright 2017-2020 NXP 8 #include <dt-bindings/clock/imx8-clock.h> 9 #include <dt-bindings/clock/imx8-lpcg.h> 10 #include <dt-bindings/firmware/imx/rsrc.h> 11 #include <dt-binding [all...] |
/freebsd/crypto/openssl/crypto/sha/asm/ |
H A D | sha1-c64xplus.pl | 2 # Copyright 2012-2020 The OpenSSL Project Authors. All Rights Reserved. 21 # If compared to compiler-generated code with similar characteristics, 32 # service routines are expected to preserve it and for own well-being 41 ($TX0,$TX1,$TX2,$TX3) = map("B$_",(28..31)); 68 || MVK -64,B0 70 || [A0] STW FP,*SP--[16] ; save frame pointer and alloca(64) 72 [A0] LDW *${CTX}[0],$A ; load A-E... 74 [A0] LDW *${CTX}[1],$B 82 LDNW *${INP}++,$TX1 ; pre-fetch input 83 NOP 1 [all …]
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/freebsd/sys/contrib/device-tree/Bindings/sound/ |
H A D | nvidia,tegra30-ahub.txt | 4 - compatible : For Tegra30, must contain "nvidia,tegra30-ahub". For Tegra114, 5 must contain "nvidia,tegra114-ahub". For Tegra124, must contain 6 "nvidia,tegra124-ahub". Otherwise, must contain "nvidia,<chip>-ahub", 8 - reg : Should contain the register physical address and length for each of 10 - Tegra30 requires 2 entries, for the APBIF and AHUB/AUDIO register blocks. 11 - Tegra114 requires an additional entry, for the APBIF2 register block. 12 - interrupts : Should contain AHUB interrupt 13 - clocks : Must contain an entry for each entry in clock-names. 14 See ../clocks/clock-bindings.txt for details. 15 - clock-names : Must include the following entries: [all …]
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H A D | renesas,rz-ssi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/renesas,rz-ss [all...] |
H A D | fsl,spdif.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Shengjiu Wang <shengjiu.wang@nxp.com> 20 - fsl,imx35-spdif 21 - fsl,vf610-spdif 22 - fsl,imx6sx-spdif 23 - fsl,imx8qm-spdif 24 - fsl,imx8qxp-spdif 25 - fsl,imx8mq-spdif [all …]
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/freebsd/sys/contrib/device-tree/Bindings/arm/freescale/ |
H A D | fsl,scu.txt | 2 -------------------------------------------------------------------- 4 The System Controller Firmware (SCFW) is a low-level system function 5 which runs on a dedicated Cortex-M core to provide power, clock, and 9 The AP communicates with the SC using a multi-ported MU module found 22 ------------------- 23 - compatible: should be "fsl,imx-scu". 24 - mbox-names: should include "tx0", "tx1", "tx2", "tx3", 27 - mboxes: List of phandle of 4 MU channels for tx, 4 MU channels for 28 rx, and 1 optional MU channel for general interrupt. 35 Channel 0 must be "tx0" or "rx0". [all …]
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/freebsd/sys/contrib/device-tree/Bindings/spi/ |
H A D | omap-spi.txt | 4 - compatible : 5 - "ti,am654-mcspi" for AM654. 6 - "ti,omap2-mcspi" for OMAP2 & OMAP3. 7 - "ti,omap4-mcspi" for OMAP4+. 8 - ti,spi-num-cs : Number of chipselect supported by the instance. 9 - ti,hwmods: Name of the hwmod associated to the McSPI 10 - ti,pindir-d0-out-d1-in: Select the D0 pin as output and D1 as 15 - dmas: List of DMA specifiers with the controller specific format 18 - dma-names: List of DMA request names. These strings correspond 19 1:1 with the DMA specifiers listed in dmas. The string naming [all …]
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H A D | omap-spi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/omap-sp [all...] |
/freebsd/sys/contrib/device-tree/Bindings/net/ |
H A D | ti,k3-am654-cpsw-nuss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/ti,k3-am654-cpsw-nuss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Grygorii Strashko <grygorii.strashko@ti.com> 11 - Sekhar Nori <nsekhar@ti.com> 22 Complex (UDMA-P) controller. 27 Support for Audio/Video Bridging (P802.1Qav/D6.0) 52 "#address-cells": true 53 "#size-cells": true [all …]
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H A D | intel,ixp4xx-hss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/net/intel,ixp4xx-hss.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Linus Walleij <linus.walleij@linaro.org> 20 const: intel,ixp4xx-hss 23 maxItems: 1 26 intel,npe-handle: 27 $ref: /schemas/types.yaml#/definitions/phandle-array 30 - description: phandle to the NPE this HSS instance is using [all …]
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/freebsd/sys/contrib/device-tree/Bindings/phy/ |
H A D | qcom,edp-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/phy/qcom,edp-phy.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Bjorn Andersson <bjorn.andersson@linaro.org> 20 - qcom,sc7280-edp-phy 21 - qcom,sc8180x-edp-phy 22 - qcom,sc8280xp-dp-phy 23 - qcom,sc8280xp-edp-phy 27 - description: PHY base register block [all …]
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H A D | samsung,ufs-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/samsung,ufs-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Alim Akhtar <alim.akhtar@samsung.com> 13 "#phy-cells": 18 - samsung,exynos7-ufs-phy 19 - samsung,exynosautov9-ufs-phy 20 - tesla,fsd-ufs-phy 23 maxItems: 1 [all …]
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/freebsd/sys/contrib/device-tree/src/arm/ti/omap/ |
H A D | omap2.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/bus/ti-sysc.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/pinctrl/omap.h> 15 interrupt-parent = <&intc>; 16 #address-cells = <1>; 17 #size-cells = <1>; 29 #address-cells = <0>; [all …]
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H A D | omap3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/bus/ti-sysc.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/pinctrl/omap.h> 15 interrupt-parent = <&intc>; 16 #address-cells = <1>; 17 #size-cells = <1>; 33 #address-cells = <1>; [all …]
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H A D | am3874-iceboard.dts | 1 // SPDX-License-Identifier: GPL-2.0 12 * Copyright (c) 2019 Three-Speed Logic, Inc. <gsmecher@threespeedlogic.com> 15 /dts-v1/; 18 #include <dt-bindings/interrupt-controller/irq.h> 25 stdout-path = "serial1:115200n8"; 31 reg = <0x80000000 0x40000000>; /* 1 GB */ 35 compatible = "regulator-fixed"; 36 regulator-name = "vmmcsd_fixed"; 37 regulator-min-microvolt = <3300000>; 38 regulator-max-microvolt = <3300000>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/rockchip/ |
H A D | rk3588s-pinctrl.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/pinctrl/rockchip.h> 7 #include "rockchip-pinconf.dtsi" 15 /omit-if-no-ref/ 16 auddsm_pins: auddsm-pins { 30 /omit-i [all...] |
/freebsd/sys/contrib/device-tree/src/arm64/amd/ |
H A D | amd-seattle-xgbe-b.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 9 compatible = "fixed-clock"; 10 #clock-cells = <0>; 11 clock-frequency = <250000000>; 12 clock-output-names = "xgmacclk0_dma_250mhz"; 16 compatible = "fixed-clock"; 17 #clock-cells = <0>; 18 clock-frequency = <250000000>; 19 clock-output-names = "xgmacclk0_ptp_250mhz"; 23 compatible = "fixed-clock"; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/ |
H A D | imx27.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 5 #include "imx27-pinfunc.h" 7 #include <dt-bindings/clock/imx27-clock.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controlle [all...] |