Lines Matching +full:tx0 +full:- +full:1
2 --------------------------------------------------------------------
4 The System Controller Firmware (SCFW) is a low-level system function
5 which runs on a dedicated Cortex-M core to provide power, clock, and
9 The AP communicates with the SC using a multi-ported MU module found
22 -------------------
23 - compatible: should be "fsl,imx-scu".
24 - mbox-names: should include "tx0", "tx1", "tx2", "tx3",
27 - mboxes: List of phandle of 4 MU channels for tx, 4 MU channels for
28 rx, and 1 optional MU channel for general interrupt.
35 Channel 0 must be "tx0" or "rx0".
36 Channel 1 must be "tx1" or "rx1".
42 &lsio_mu1 0 1
45 &lsio_mu1 1 0
46 &lsio_mu1 1 1
47 &lsio_mu1 1 2
48 &lsio_mu1 1 3
63 Client nodes are maintained as children of the relevant IMX-SCU device node.
66 ------------------------------------------------------------
72 - compatible: Should be one of:
73 "fsl,imx8qm-scu-pd",
74 "fsl,imx8qxp-scu-pd"
75 followed by "fsl,scu-pd"
77 - #power-domain-cells: Must be 1. Contains the Resource ID used by
80 include/dt-bindings/firmware/imx/rsrc.h
83 ------------------------------------------------------------
85 This binding uses the common clock binding[1].
88 - compatible: Should be one of:
89 "fsl,imx8dxl-clk"
90 "fsl,imx8qm-clk"
91 "fsl,imx8qxp-clk"
92 followed by "fsl,scu-clk"
93 - #clock-cells: Should be 2.
95 - clocks: List of clock specifiers, must contain an entry for
96 each required entry in clock-names
97 - clock-names: Should include entries "xtal_32KHz", "xtal_24MHz"
103 include/dt-bindings/clock/imx8qxp-clock.h
106 ------------------------------------------------------------
111 - compatible: Should be one of:
112 "fsl,imx8qm-iomuxc",
113 "fsl,imx8qxp-iomuxc",
114 "fsl,imx8dxl-iomuxc".
117 - fsl,pins: Each entry consists of 3 integers which represents
121 <dt-bindings/pinctrl/pads-imx8qm.h>,
122 <dt-bindings/pinctrl/pads-imx8qxp.h>,
123 <dt-bindings/pinctrl/pads-imx8dxl.h>.
125 pull-up on this pin.
130 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
131 [2] Documentation/devicetree/bindings/power/power-domain.yaml
132 [3] Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt
135 ------------------------------------------------------------
138 - compatible: should be "fsl,imx8qxp-sc-rtc";
141 ------------------------------------------------------------
143 - compatible: Should be one of:
144 "fsl,imx8qm-scu-ocotp",
145 "fsl,imx8qxp-scu-ocotp".
146 - #address-cells: Must be 1. Contains byte index
147 - #size-cells: Must be 1. Contains byte length
151 - Data cells of ocotp:
155 ------------------------------------------------------------
158 - compatible: should be:
159 "fsl,imx8qxp-sc-wdt"
160 followed by "fsl,imx-sc-wdt";
162 - timeout-sec: contains the watchdog timeout in seconds.
165 ------------------------------------------------------------
168 - compatible: should be:
169 "fsl,imx8qxp-sc-key"
170 followed by "fsl,imx-sc-key";
171 - linux,keycodes: See Documentation/devicetree/bindings/input/input.yaml
174 ------------------------------------------------------------
177 - compatible: Should be :
178 "fsl,imx8qxp-sc-thermal"
179 followed by "fsl,imx-sc-thermal";
181 - #thermal-sensor-cells: See Documentation/devicetree/bindings/thermal/thermal-sensor.yaml
185 -------------
192 #mbox-cells = <2>;
197 compatible = "fsl,imx-scu";
198 mbox-names = "tx0", "tx1", "tx2", "tx3",
202 &lsio_mu1 0 1
205 &lsio_mu1 1 0
206 &lsio_mu1 1 1
207 &lsio_mu1 1 2
208 &lsio_mu1 1 3
212 compatible = "fsl,imx8qxp-clk", "fsl,scu-clk";
213 #clock-cells = <2>;
217 compatible = "fsl,imx8qxp-iomuxc";
228 ocotp: imx8qx-ocotp {
229 compatible = "fsl,imx8qxp-scu-ocotp";
230 #address-cells = <1>;
231 #size-cells = <1>;
238 pd: imx8qx-pd {
239 compatible = "fsl,imx8qxp-scu-pd", "fsl,scu-pd";
240 #power-domain-cells = <1>;
244 compatible = "fsl,imx8qxp-sc-rtc";
247 scu_key: scu-key {
248 compatible = "fsl,imx8qxp-sc-key", "fsl,imx-sc-key";
253 compatible = "fsl,imx8qxp-sc-wdt", "fsl,imx-sc-wdt";
254 timeout-sec = <60>;
257 tsens: thermal-sensor {
258 compatible = "fsl,imx8qxp-sc-thermal", "fsl,imx-sc-thermal";
259 #thermal-sensor-cells = <1>;
266 pinctrl-names = "default";
267 pinctrl-0 = <&pinctrl_lpuart0>;
269 clock-names = "ipg";
270 power-domains = <&pd IMX_SC_R_UART_0>;