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/freebsd/sys/contrib/device-tree/Bindings/ata/
H A Dbaikal,bt1-ahci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ata/baikal,bt1-ahci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Baikal-T1 SoC AHCI SATA controller
10 - Serge Semin <fancer.lancer@gmail.com>
13 AHCI SATA controller embedded into the Baikal-T1 SoC is based on the
14 DWC AHCI SATA v4.10a IP-core.
17 - $ref: snps,dwc-ahci-common.yaml#
21 const: baikal,bt1-ahci
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H A Dsnps,dwc-ahci-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ata/snps,dwc-ahci-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Serge Semin <fancer.lancer@gmail.com>
19 - $ref: ahci-common.yaml#
31 PM-alive clock, RxOOB detection clock, embedded PHYs reference (Rx/Tx)
36 clock-names:
41 - description: Application APB/AHB/AXI BIU clock
43 - pclk
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H A Dsnps,dwc-ahci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ata/snps,dwc-ahci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Serge Semin <fancer.lancer@gmail.com>
20 - snps,dwc-ahci
21 - snps,spear-ahci
23 - compatible
26 - $ref: snps,dwc-ahci-common.yaml#
31 - description: Synopsys AHCI SATA-compatible devices
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H A Drockchip,dwc-ahci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ata/rockchip,dwc-ahci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Serge Semin <fancer.lancer@gmail.com>
22 - rockchip,rk3568-dwc-ahci
23 - rockchip,rk3588-dwc-ahci
25 - compatible
30 - enum:
31 - rockchip,rk3568-dwc-ahci
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/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dspear1310-evb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 compatible = "st,spear1310-evb", "st,spear1310";
14 #address-cells = <1>;
15 #size-cells = <1>;
23 pinctrl-name
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H A Dspear1340-evb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 compatible = "st,spear1340-evb", "st,spear1340";
14 #address-cells = <1>;
15 #size-cells = <1>;
23 pinctrl-name
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/freebsd/sys/dev/ath/ath_hal/ar5211/
H A Dar5211_xmit.c1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2006 Atheros Communications, Inc.
30 * Update Tx FIFO trigger level.
45 * is called from both ISR and non-ISR contexts. in ar5211UpdateTxTrigLevel()
53 ((MAX_TX_FIFO_THRESHOLD - curTrigLevel) / 2); in ar5211UpdateTxTrigLevel()
58 curTrigLevel--; in ar5211UpdateTxTrigLevel()
61 /* re-enable chip interrupts */ in ar5211UpdateTxTrigLevel()
69 /* re-enable chip interrupts */ in ar5211UpdateTxTrigLevel()
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsc7280-crd-r3.dts1 // SPDX-License-Identifier: BSD-3-Clause
8 /dts-v1/;
10 #include "sc7280-idp.dtsi"
11 #include "sc7280-idp-ec-h1.dtsi"
14 model = "Qualcomm Technologies, Inc. sc7280 CRD platform (rev3 -
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H A Dsc7280-qcard.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
14 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
15 #include <dt-bindings/iio/qcom,spmi-adc7-pmr735a.h>
16 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
17 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
34 wcd9385: audio-codec-1 {
35 compatible = "qcom,wcd9385-codec";
36 pinctrl-names = "default", "sleep";
37 pinctrl-0 = <&wcd_reset_n>, <&us_euro_hs_sel>;
38 pinctrl-1 = <&wcd_reset_n_sleep>, <&us_euro_hs_sel>;
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H A Dsm8650-qrd.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
22 compatible = "qcom,sm8650-qrd", "qcom,sm8650";
30 stdout-path = "serial0:115200n8";
33 gpio-keys {
34 compatible = "gpio-keys";
36 pinctrl-0 = <&volume_up_n>;
37 pinctrl-names = "default";
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H A Dsm8550-qrd.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
23 compatible = "qcom,sm8550-qrd", "qcom,sm8550";
24 chassis-type = "handset";
31 wcd938x: audio-codec {
32 compatible = "qcom,wcd9385-codec";
34 pinctrl-names = "default";
35 pinctrl-0 = <&wcd_default>;
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H A Dmsm8998-fxtec-pro1.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
20 chassis-typ
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H A Dsc7280-herobrine-herobrine-r0.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
11 #include <dt-bindings/iio/qcom,spmi-adc7-pmr735a.h>
12 #include <dt-bindings/input/gpio-keys.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
15 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
24 #include "sc7280-chrome-common.dtsi"
28 compatible = "google,herobrine-rev0", "qcom,sc7280";
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H A Dsdm845-xiaomi-polaris.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulato
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H A Dmsm8998-xiaomi-sagit.dts1 // SPDX-License-Identifier: BSD-3-Clause
3 * Xiaomi Mi 6 (sagit) device tree source based on msm8998-mtp.dtsi
10 /dts-v1/;
16 #include <dt-bindings/input/input.h>
17 #include <dt-bindings/leds/common.h>
18 #include <dt-bindings/pinctrl/qcom,pmic-gpi
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/freebsd/sys/dev/ath/ath_hal/ar5416/
H A Dar5416_xmit.c1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2008 Atheros Communications, Inc.
40 HALASSERT(q < AH_PRIVATE(ah)->ah_caps.halTotalQueues); in ar5416StopTxDma()
42 HALASSERT(AH5212(ah)->ah_txq[q].tqi_type != HAL_TX_QUEUE_INACTIVE); in ar5416StopTxDma()
45 for (i = STOP_DMA_TIMEOUT/STOP_DMA_ITER; i != 0; i--) { in ar5416StopTxDma()
71 "%s: Num of pending TX Frames %d on Q %d\n", in ar5416StopTxDma()
74 /* Kill last PCU Tx Frame */ in ar5416StopTxDma()
75 /* TODO - save off and restore current values of Q1/Q2? */ in ar5416StopTxDma()
[all …]
/freebsd/sys/dev/ath/ath_hal/ar5212/
H A Dar5212_xmit.c1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2008 Atheros Communications, Inc.
38 * Update Tx FIFO trigger level.
52 if (ahp->ah_txTrigLev >= ahp->ah_maxTxTrigLev) in ar5212UpdateTxTrigLevel()
58 omask = ath_hal_setInterrupts(ah, ahp->ah_maskReg &~ HAL_INT_GLOBAL); in ar5212UpdateTxTrigLevel()
64 if (curLevel < ahp->ah_maxTxTrigLev) in ar5212UpdateTxTrigLevel()
67 newLevel--; in ar5212UpdateTxTrigLevel()
73 ahp->ah_txTrigLev = newLevel; in ar5212UpdateTxTrigLevel()
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/freebsd/sys/contrib/device-tree/src/arm/microchip/
H A Dat91sam9x5ek.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9x5ek.dtsi - Device Tree file for AT91SAM9x5CM Base board
11 model = "Atmel AT91SAM9X5-EK";
16 stdout-path = "serial0:115200n8";
20 compatible = "atmel,sam9x5-wm8731-audio";
24 atmel,audio-routing =
30 atmel,ssc-controller = <&ssc0>;
31 atmel,audio-codec = <&wm8731>;
36 atmel,adc-ts-wires = <4>;
37 atmel,adc-ts-pressure-threshold = <10000>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3588-extra.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "rk3588-base.dtsi"
7 #include "rk3588-extra-pinctrl.dtsi"
11 compatible = "rockchip,rk3588-dwc3", "snps,dwc3";
16 clock-names = "ref_clk", "suspend_clk", "bus_clk";
19 phy-names = "usb2-phy", "usb3-phy";
21 power-domains = <&power RK3588_PD_USB>;
24 snps,dis-u2-freeclk-exists-quirk;
25 snps,dis-del-phy-power-chg-quirk;
26 snps,dis-tx-ipgap-linecheck-quirk;
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8ulp-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
12 compatible = "fsl,imx8ulp-evk", "fsl,imx8ulp";
15 stdout-path = &lpuart5;
23 reserved-memory {
24 #address-cells = <2>;
25 #size-cells = <2>;
29 compatible = "shared-dma-pool";
32 linux,cma-default;
35 m33_reserved: noncacheable-section@a8600000 {
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/freebsd/sys/contrib/device-tree/src/arm/cirrus/
H A Dep93xx-ts7250.dts1 // SPDX-License-Identifier: GPL-2.0
5 /dts-v1/;
10 model = "TS-7250 SBC";
11 #address-cells = <1>;
12 #size-cells = <1>;
25 compatible = "gpio-leds";
26 led-0 {
29 linux,default-trigger = "heartbeat";
33 led-1 {
42 nand-controller@60000000 {
[all …]
/freebsd/sys/dev/ath/ath_rate/sample/
H A Dsample.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
17 * 3. Neither the names of the above-listed copyright holders nor the names
86 * in "Bit-rate Selection in Wireless Networks"
87 * (http://www.pdos.lcs.mit.edu/papers/jbicket-ms.ps)
89 * SampleRate chooses the bit-rate it predicts will provide the most
90 * throughput based on estimates of the expected per-packet
91 * transmission time for each bit-rate. SampleRate periodically sends
92 * packets at bit-rates other than the current one to estimate when
93 * another bit-rate will provide better performance. SampleRate
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/freebsd/sys/dev/ath/
H A Dif_ath.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
44 * by the driver - eg, calls to ath_hal_gettsf32().
132 * Only enable this if you're working on PS-POLL support.
140 * 4 is probably a good max as otherwise the beacons become
240 static int ath_anicalinterval = 100; /* ANI calibration - 100 msec */
247 int ath_txbuf = ATH_TXBUF; /* # tx buffers to allocate */
249 0, "tx buffers allocated");
250 int ath_txbuf_mgmt = ATH_MGMT_TXBUF; /* # mgmt tx buffers to allocate */
[all …]
H A Dif_ath_tx.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * Copyright (c) 2010-2012 Adrian Chadd, Xenion Pty Ltd
116 * What queue to throw the non-QoS TID traffic into
148 if (bf->bf_nseg == 0) in ath_tx_alq_post()
150 n = ((bf->bf_nseg - 1) / sc->sc_tx_nmaps) + 1; in ath_tx_alq_post()
151 for (i = 0, ds = (const char *) bf->bf_desc; in ath_tx_alq_post()
153 i++, ds += sc->sc_tx_desclen) { in ath_tx_alq_post()
154 if_ath_alq_post(&sc->sc_alq, in ath_tx_alq_post()
[all …]
/freebsd/sys/dev/axgbe/
H A Dxgbe-drv.c4 * Copyright (c) 2014-2016,2020 Advanced Micro Devices, Inc.
116 #include "xgbe-common.h"
124 return (-EINVAL); in xgbe_calc_rx_buf_size()
127 rx_buf_size = min(max(rx_buf_size, XGBE_RX_MIN_BUF_SIZE), PAGE_SIZE); in xgbe_calc_rx_buf_size()
128 rx_buf_size = (rx_buf_size + XGBE_RX_BUF_ALIGN - 1) & in xgbe_calc_rx_buf_size()
129 ~(XGBE_RX_BUF_ALIGN - 1); in xgbe_calc_rx_buf_size()
138 struct xgbe_hw_features *hw_feat = &pdata->hw_feat; in xgbe_get_all_hw_features()
140 DBGPR("-->xgbe_get_all_hw_features\n"); in xgbe_get_all_hw_features()
148 hw_feat->version = XGMAC_IOREAD(pdata, MAC_VR); in xgbe_get_all_hw_features()
151 hw_feat->gmii = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, GMIISEL); in xgbe_get_all_hw_features()
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