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Searched +full:tx +full:- +full:swing +full:- +full:low (Results 1 – 14 of 14) sorted by relevance

/linux/Documentation/devicetree/bindings/display/bridge/
H A Danalogix,anx7625.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Xin Ji <xji@analogixsemi.com>
14 The ANX7625 is an ultra-low power 4K Mobile HD Transmitter
28 enable-gpios:
32 reset-gpios:
36 vdd10-supply:
39 vdd18-supply:
42 vdd33-supply:
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/linux/Documentation/devicetree/bindings/pci/
H A Dfsl,imx6q-pcie-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lucas Stach <l.stach@pengutronix.de>
11 - Richard Zhu <hongxing.zhu@nxp.com>
22 clock-names:
26 num-lanes:
29 fsl,imx7d-pcie-phy:
31 description: A phandle to an fsl,imx7d-pcie-phy node. Additional
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/linux/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/
H A Ddm.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2009-2010 Realtek Corporation.*/
17 0x081, /* 0, -12.0dB */
18 0x088, /* 1, -11.5dB */
19 0x090, /* 2, -11.0dB */
20 0x099, /* 3, -10.5dB */
21 0x0A2, /* 4, -10.0dB */
22 0x0AC, /* 5, -9.5dB */
23 0x0B6, /* 6, -9.0dB */
24 0x0C0, /* 7, -8.5dB */
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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qdl-var-dart.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Support for Variscite DART-MX6 Module
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/sound/fsl-imx-audmux.h>
18 reg_3p3v: regulator-3p3v {
19 compatible = "regulator-fixed";
20 regulator-name = "3P3V";
21 regulator-min-microvolt = <3300000>;
22 regulator-max-microvolt = <3300000>;
23 regulator-always-on;
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/linux/drivers/net/phy/
H A Dbcm7xxx.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2014-2017 Broadcom
11 #include "bcm-phy-lib.h"
58 /* AFE_RXCONFIG_2, set rCal offset for HT=0 code and LT=-2 code */ in bcm7xxx_28nm_d0_afe_config_init()
73 /* AFE_HPF_TRIM_OTHERS, set 100Tx/10BT to -4.5% swing and set rCal in bcm7xxx_28nm_d0_afe_config_init()
81 /* DSP_TAP10, adjust bias current trim (+0% swing, +0 tick) */ in bcm7xxx_28nm_d0_afe_config_init()
101 /* AFE_HPF_TRIM_OTHERS, set 100Tx/10BT to -4.5% swing and set rCal in bcm7xxx_28nm_e0_plus_afe_config_init()
109 /* DSP_TAP10, adjust bias current trim (+0% swing, +0 tick) */ in bcm7xxx_28nm_e0_plus_afe_config_init()
132 /* Change 100Tx EEE bandwidth */ in bcm7xxx_28nm_a0_patch_afe_config_init()
145 u8 rev = PHY_BRCM_7XXX_REV(phydev->dev_flags); in bcm7xxx_28nm_config_init()
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/linux/drivers/infiniband/hw/hfi1/
H A Dpcie.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Copyright(c) 2015 - 2019 Intel Corporation.
27 struct pci_dev *pdev = dd->pcidev; in hfi1_pcie_init()
43 dd_dev_err(dd, "pci enable failed: error %d\n", -ret); in hfi1_pcie_init()
49 dd_dev_err(dd, "pci_request_regions fails: err %d\n", -ret); in hfi1_pcie_init()
53 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); in hfi1_pcie_init()
60 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); in hfi1_pcie_init()
90 * fields required to re-initialize after a chip reset, or for
111 return -EINVAL; in hfi1_pcie_ddinit()
114 dd->kregbase1 = ioremap(addr, RCV_ARRAY); in hfi1_pcie_ddinit()
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/linux/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/
H A Dhal_btc.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2009-2012 Realtek Corporation.*/
19 if (!rtlpriv->btcoexist.bt_coexistence) in rtl8723e_dm_bt_turn_off_bt_coexist_before_enter_lps()
22 if (ppsc->inactiveps) { in rtl8723e_dm_bt_turn_off_bt_coexist_before_enter_lps()
25 rtlpriv->btcoexist.cstate = 0; in rtl8723e_dm_bt_turn_off_bt_coexist_before_enter_lps()
26 rtlpriv->btcoexist.previous_state = 0; in rtl8723e_dm_bt_turn_off_bt_coexist_before_enter_lps()
27 rtlpriv->btcoexist.cstate_h = 0; in rtl8723e_dm_bt_turn_off_bt_coexist_before_enter_lps()
28 rtlpriv->btcoexist.previous_state_h = 0; in rtl8723e_dm_bt_turn_off_bt_coexist_before_enter_lps()
38 u8 bibss = (mac->opmode == NL80211_IFTYPE_ADHOC) ? 1 : 0; in mgnt_link_status_query()
39 if (bibss || rtlpriv->mac80211.link_state >= MAC80211_LINKED) in mgnt_link_status_query()
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/linux/drivers/net/wireless/realtek/rtw88/
H A Drtw8822b.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2018-2019 Realtek Corporation
9 #include "tx.h"
26 ether_addr_copy(efuse->addr, map->e.mac_addr); in rtw8822be_efuse_parsing()
32 ether_addr_copy(efuse->addr, map->u.mac_addr); in rtw8822bu_efuse_parsing()
38 ether_addr_copy(efuse->addr, map->s.mac_addr); in rtw8822bs_efuse_parsing()
43 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8822b_read_efuse()
49 efuse->usb_mode_switch = u8_get_bits(map->usb_mode, BIT(7)); in rtw8822b_read_efuse()
50 efuse->rfe_option = map->rfe_option; in rtw8822b_read_efuse()
51 efuse->rf_board_option = map->rf_board_option; in rtw8822b_read_efuse()
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/linux/drivers/scsi/qla2xxx/
H A Dqla_def.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright (c) 2003-2014 QLogic Corporation
15 #include <linux/dma-mapping.h>
234 /* 83XX: Macros defining 8200 AEN Error-levels */
248 /* 83XX: Macros for defining IDC-Control bits */
257 /* 83XX: Macros for defining class in DEV-Partition Info register */
263 /* 83XX: Macros for IDC Lock-Recovery stages */
265 * lock-recovery
267 #define IDC_LOCK_RECOVERY_STAGE2 0x2 /* Stage2: Perform lock-recovery */
270 #define IDC_AUDIT_TIMESTAMP 0x0 /* IDC-AUDIT: Record timestamp of
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/linux/drivers/net/wireless/realtek/rtlwifi/btcoexist/
H A Dhalbtc8821a2ant.c1 // SPDX-License-Identifier: GPL-2.0
7 * This file is for RTL8821A Co-exist mechanism
45 struct rtl_priv *rtlpriv = btcoexist->adapter; in btc8821a2ant_bt_rssi_state()
47 u8 bt_rssi_state = coex_sta->pre_bt_rssi_state; in btc8821a2ant_bt_rssi_state()
49 bt_rssi = coex_sta->bt_rssi; in btc8821a2ant_bt_rssi_state()
52 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) || in btc8821a2ant_bt_rssi_state()
53 (coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { in btc8821a2ant_bt_rssi_state()
62 "[BTCoex], BT Rssi state stay at Low\n"); in btc8821a2ant_bt_rssi_state()
68 "[BTCoex], BT Rssi state switch to Low\n"); in btc8821a2ant_bt_rssi_state()
79 return coex_sta->pre_bt_rssi_state; in btc8821a2ant_bt_rssi_state()
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H A Dhalbtc8723b2ant.c1 // SPDX-License-Identifier: GPL-2.0
7 * This file is for RTL8723B Co-exist mechanism
44 struct rtl_priv *rtlpriv = btcoexist->adapter; in btc8723b2ant_bt_rssi_state()
46 u8 bt_rssi_state = coex_sta->pre_bt_rssi_state; in btc8723b2ant_bt_rssi_state()
48 bt_rssi = coex_sta->bt_rssi; in btc8723b2ant_bt_rssi_state()
51 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) || in btc8723b2ant_bt_rssi_state()
52 (coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { in btc8723b2ant_bt_rssi_state()
61 "[BTCoex], BT Rssi state stay at Low\n"); in btc8723b2ant_bt_rssi_state()
67 "[BTCoex], BT Rssi state switch to Low\n"); in btc8723b2ant_bt_rssi_state()
78 return coex_sta->pre_bt_rssi_state; in btc8723b2ant_bt_rssi_state()
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H A Dhalbtc8192e2ant.c1 // SPDX-License-Identifier: GPL-2.0
35 struct rtl_priv *rtlpriv = btcoexist->adapter; in btc8192e2ant_bt_rssi_state()
37 u8 bt_rssi_state = coex_sta->pre_bt_rssi_state; in btc8192e2ant_bt_rssi_state()
39 bt_rssi = coex_sta->bt_rssi; in btc8192e2ant_bt_rssi_state()
42 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) || in btc8192e2ant_bt_rssi_state()
43 (coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { in btc8192e2ant_bt_rssi_state()
59 return coex_sta->pre_bt_rssi_state; in btc8192e2ant_bt_rssi_state()
62 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) || in btc8192e2ant_bt_rssi_state()
63 (coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) { in btc8192e2ant_bt_rssi_state()
69 } else if ((coex_sta->pre_bt_rssi_state == in btc8192e2ant_bt_rssi_state()
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/linux/drivers/gpu/drm/bridge/
H A Dtc358767.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * TC358767/TC358867/TC9595 DSI/DPI-to-DPI/(e)DP bridge driver
6 * All modes are supported -- DPI->(e)DP / DSI->DPI / DSI->(e)DP .
27 #include <linux/media-bus-format.h>
44 /* DSI D-PHY Layer registers */
77 #define DSI_STARTDSI 0x0204 /* START control bit of DSI-TX */
110 #define SUB_CFG_TYPE_CONFIG3 (2 << 2) /* LSB aligned 8-bit */
179 #define INT_GP0_LCNT 0x0584 /* Interrupt GPIO0 Low Count Value Register */
180 #define INT_GP1_LCNT 0x0588 /* Interrupt GPIO1 Low Count Value Register */
184 #define VID_MN_GEN BIT(6) /* Auto-generate M/N values */
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/linux/drivers/gpu/drm/display/
H A Ddrm_dp_helper.c76 return link_status[r - DP_LANE0_1_STATUS]; in dp_link_status()
230 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x (max 4)\n", in __8b10b_clock_recovery_delay_us()
231 aux->name, rd_interval); in __8b10b_clock_recovery_delay_us()
242 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x (max 4)\n", in __8b10b_channel_eq_delay_us()
243 aux->name, rd_interval); in __8b10b_channel_eq_delay_us()
255 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x\n", in __128b132b_channel_eq_delay_us()
256 aux->name, rd_interval); in __128b132b_channel_eq_delay_us()
278 * - Clock recovery vs. channel equalization
279 * - DPRX vs. LTTPR
280 * - 128b/132b vs. 8b/10b
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