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/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dibm,emac.txt8 correct clock-frequency property.
13 - device_type : "network"
15 - compatible : compatible list, contains 2 entries, first is
16 "ibm,emac-CHIP" where CHIP is the host ASIC (440gx,
18 "ibm,emac4". For Axon, thus, we have: "ibm,emac-axon",
20 - interrupts : <interrupt mapping for EMAC IRQ and WOL IRQ>
21 - reg : <registers mapping>
22 - local-mac-address : 6 bytes, MAC address
23 - mal-device : phandle of the associated McMAL node
24 - mal-tx-channel : 1 cell, index of the tx channel on McMAL associated
[all …]
/freebsd/sys/dts/powerpc/
H A Dp3041si.dtsi4 * Copyright 2010-2011 Freescale Semiconductor Inc.
35 /dts-v1/;
39 #address-cells = <2>;
40 #size-cells = <2>;
41 interrupt-parent = <&mpic>;
102 #address-cells = <1>;
103 #size-cells = <0>;
108 bus-frequency = <749999996>;
109 next-level-cache = <&L2_0>;
110 L2_0: l2-cache {
[all …]
H A Dp2041si.dtsi35 /dts-v1/;
39 #address-cells = <2>;
40 #size-cells = <2>;
41 interrupt-parent = <&mpic>;
101 #address-cells = <1>;
102 #size-cells = <0>;
107 bus-frequency = <749999996>;
108 next-level-cache = <&L2_0>;
109 L2_0: l2-cache {
110 next-level-cache = <&cpc>;
[all …]
H A Dp5020si.dtsi4 * Copyright 2010-2011 Freescale Semiconductor Inc.
35 /dts-v1/;
39 #address-cells = <2>;
40 #size-cells = <2>;
41 interrupt-parent = <&mpic>;
108 #address-cells = <1>;
109 #size-cells = <0>;
114 bus-frequency = <799999998>;
115 next-level-cache = <&L2_0>;
116 L2_0: l2-cache {
[all …]
/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dsamsung-i2s.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/samsung-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Sylweste
[all...]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dfsl-ls1012a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1012A family SoC.
6 * Copyright 2019-2020 NXP
10 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
23 rtic-a = &rtic_a;
[all …]
H A Dfsl-ls1028a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1028A family SoC.
5 * Copyright 2018-2020 NXP
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
22 #address-cells = <1>;
[all …]
H A Dimx8mn.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mn-clock.h>
7 #include <dt-bindings/power/imx8mn-power.h>
8 #include <dt-bindings/reset/imx8mq-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx8mn-pinfunc.h"
17 interrupt-parent = <&gic>;
[all …]
H A Dimx93.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx93-clock.h>
7 #include <dt-bindings/dma/fsl-edma.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/fsl,imx93-power.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx93-pinfunc.h"
17 interrupt-parent = <&gic>;
[all …]
H A Dimx8ulp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8ulp-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/power/imx8ulp-power.h>
10 #include <dt-bindings/thermal/thermal.h>
12 #include "imx8ulp-pinfunc.h"
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
[all …]
H A Dimx8mm.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mm-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/imx8mm-power.h>
11 #include <dt-bindings/reset/imx8mq-reset.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx8mm-pinfunc.h"
17 interrupt-parent = <&gic>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/vf/
H A Dvfxxx.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 #include "vf610-pinfunc.h"
6 #include <dt-bindings/clock/vf610-clock.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/gpio/gpio.h>
32 compatible = "fixed-cloc
[all...]
/freebsd/sys/contrib/device-tree/Bindings/dsp/
H A Dmediatek,mt8186-dsp.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dsp/mediatek,mt8186-dsp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tinghan Shen <tinghan.shen@mediatek.com>
14 advanced pre- and post- audio processing.
19 - mediatek,mt8186-dsp
20 - mediatek,mt8188-dsp
24 - description: Address and size of the DSP config registers
25 - description: Address and size of the DSP SRAM
[all …]
/freebsd/contrib/wpa/wpa_supplicant/
H A Dscan.h2 * WPA Supplicant - Scanning
3 * Copyright (c) 2003-2014, Jouni Malinen <j@w1.fi>
17 #define DEFAULT_NOISE_FLOOR_2GHZ (-89)
18 #define DEFAULT_NOISE_FLOOR_5GHZ (-92)
19 #define DEFAULT_NOISE_FLOOR_6GHZ (-92)
23 * This doc https://supportforums.cisco.com/docs/DOC-12954 says, "the general
34 * IEEE Sts 802.11ax-2021, 9.4.2.161 (Transmit Power Envelope element) indicates
35 * no max TX power limit if Maximum Transmit Power field is 63.5 dBm.
36 * The default TX power if it is not constrained by Transmit Power Envelope
42 void wpa_supplicant_req_scan(struct wpa_supplicant *wpa_s, int sec, int usec);
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/ls/
H A Dls1021a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright 2013-2014 Freescale Semiconductor, Inc.
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/thermal/thermal.h>
10 #address-cells = <2>;
11 #size-cells = <2>;
12 interrupt-parent = <&gic>;
30 #address-cells = <1>;
31 #size-cells = <0>;
34 compatible = "arm,cortex-a7";
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6ul.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/imx6ul-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include "imx6ul-pinfunc.h"
12 #address-cells = <1>;
13 #size-cells = <1>;
16 * pre-existing /chosen node to be available to insert the
57 #address-cells = <1>;
[all …]
H A Dimx6qdl.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/imx6qdl-clock.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 * pre-existing /chosen node to be available to insert the
58 compatible = "fixed-clock";
59 #clock-cells = <0>;
60 clock-frequency = <32768>;
[all …]
H A Dimx7s.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/imx7d-clock.h>
7 #include <dt-bindings/power/imx7-power.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/imx7-reset.h>
12 #include "imx7d-pinfunc.h"
15 #address-cells = <1>;
16 #size-cells = <1>;
[all …]
/freebsd/sys/dev/ena/
H A Dena.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2015-2024 Amazon.com, Inc. or its affiliates.
37 #include "ena-com/ena_com.h"
38 #include "ena-com/ena_eth_com.h"
55 /* Calculate DMA mask - width for ena cannot exceed 48, so it is safe */
56 #define ENA_DMA_BIT_MASK(x) ((1ULL << (x)) - 1ULL)
72 #define ENA_BASE_CPU_UNSPECIFIED -1
98 * TX budget for cleaning. It should be half of the RX budget to reduce amount
102 /* RX cleanup budget. -1 stands for infinity. */
[all …]
/freebsd/sys/dev/ioat/
H A Dioat_test.c1 /*-
54 #define time_after(a,b) ((long)(b) - (long)(a) < 0)
83 ioat_test_transaction_destroy(struct test_transaction *tx) in ioat_test_transaction_destroy() argument
88 if (tx->buf[i] != NULL) { in ioat_test_transaction_destroy()
89 free(tx->buf[i], M_IOAT_TEST); in ioat_test_transaction_destroy()
90 tx->buf[i] = NULL; in ioat_test_transaction_destroy()
94 free(tx, M_IOAT_TES in ioat_test_transaction_destroy()
107 struct test_transaction *tx; ioat_test_transaction_create() local
146 ioat_compare_ok(struct test_transaction * tx) ioat_compare_ok() argument
180 struct test_transaction *tx; ioat_dma_test_callback() local
206 struct test_transaction *tx; ioat_test_prealloc_memory() local
237 struct test_transaction *tx, *s; ioat_test_release_memory() local
251 struct test_transaction *tx; ioat_test_submit_1_tx() local
[all...]
/freebsd/sys/dev/qlnx/qlnxe/
H A Decore_init_fw_funcs.h2 * Copyright (c) 2017-2018 Cavium, Inc.
36 * @brief ecore_qm_pf_mem_size - Prepare QM ILT sizes
41 * @param num_pf_cids - number of connections used by this PF
42 * @param num_vf_cids - number of connections used by VFs of this PF
43 * @param num_tids - number of tasks used by this PF
44 * @param num_pf_pqs - number of PQs used by this PF
45 * @param num_vf_pqs - number of PQs used by VFs of this PF
56 * @brief ecore_qm_common_rt_init - Prepare QM runtime init values for the
59 * @param p_hwfn - HW device data
60 * @param max_ports_per_engine - max number of ports per engine in HW
[all …]
/freebsd/sys/contrib/dev/iwlwifi/pcie/
H A Dctxt-info.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
4 * Copyright (C) 2018-2024 Intel Corporation
6 #include "iwl-trans.h"
7 #include "iwl-fh.h"
8 #include "iwl-context-inf
[all...]
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dqcom,gcc-sm8350.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sm8350.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
16 See also:: include/dt-bindings/clock/qcom,gcc-sm8350.h
20 const: qcom,gcc-sm8350
24 - description: Board XO source
25 - description: Sleep clock source
26 - description: PCIE 0 Pipe clock source (Optional clock)
[all …]
/freebsd/sys/net/
H A Dif_bridgevar.h4 * SPDX-License-Identifier: BSD-4-Clause
120 #define BRDGSTXHC 29 /* set tx hold count (ifbrparam) */
222 #define ifbrp_ctime ifbrp_ifbrpu.ifbrpu_int32 /* cache time (sec) */
225 #define ifbrp_txhc ifbrp_ifbrpu.ifbrpu_int8 /* bpdu tx holdcount */
226 #define ifbrp_hellotime ifbrp_ifbrpu.ifbrpu_int8 /* hello time (sec) */
227 #define ifbrp_fwddelay ifbrp_ifbrpu.ifbrpu_int8 /* fwd time (sec) */
228 #define ifbrp_maxage ifbrp_ifbrpu.ifbrpu_int8 /* max age (sec) */
284 "-", \
307 KASSERT((_ifp)->if_bridge_input != NULL, \
309 _m = (*(_ifp)->if_bridge_input)(_ifp, _m); \
[all …]
/freebsd/sys/contrib/dev/iwlwifi/fw/api/
H A Dpower.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2012-2014, 2018-2024 Intel Corporation
4 * Copyright (C) 2013-2014 Intel Mobile Communications GmbH
5 * Copyright (C) 2015-2017 Intel Deutschland GmbH
13 * enum iwl_ltr_config_flags - mask
[all...]

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