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/linux/Documentation/devicetree/bindings/net/
H A Dsophgo,sg2044-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/sophgo,sg2044-dwmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Inochi Amaoto <inochiama@gmail.com>
17 - sophgo,sg2044-dwmac
18 - sophgo,sg2042-dwmac
20 - compatible
25 - items:
26 - const: sophgo,sg2042-dwmac
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H A Dintel,dwmac-plat.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/intel,dwmac-plat.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com>
17 - intel,keembay-dwmac
19 - compatible
22 - $ref: snps,dwmac.yaml#
27 - items:
28 - enum:
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H A Dsophgo,cv1800b-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/sophgo,cv1800b-dwmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Inochi Amaoto <inochiama@gmail.com>
17 - sophgo,cv1800b-dwmac
19 - compatible
24 - const: sophgo,cv1800b-dwmac
25 - const: snps,dwmac-3.70a
32 - description: GMAC main clock
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/linux/arch/arm64/boot/dts/st/
H A Dstm32mp253.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
11 compatible = "arm,cortex-a35";
14 enable-method = "psci";
15 power-domains = <&CPU_PD1>;
16 power-domain-names = "psci";
20 arm-pmu {
23 interrupt-affinity = <&cpu0>, <&cpu1>;
27 CPU_PD1: power-domain-cpu1 {
28 #power-domain-cells = <0>;
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H A Dstm32mp233.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2025 - All Rights Reserved
11 compatible = "arm,cortex-a35";
14 enable-method = "psci";
15 power-domains = <&cpu1_pd>;
16 power-domain-names = "psci";
20 arm-pmu {
23 interrupt-affinity = <&cpu0>, <&cpu1>;
27 cpu1_pd: power-domain-cpu1 {
28 #power-domain-cells = <0>;
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/linux/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_dcb_82599.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
10 * ixgbe_dcb_config_rx_arbiter_82599 - Config Rx Data arbiter
70 * ixgbe_dcb_config_tx_desc_arbiter_82599 - Config Tx Desc. arbiter
77 * Configure Tx Descriptor Arbiter and credits for each traffic class.
88 /* Clear the per-Tx queue credits; we use per-TC instead */ in ixgbe_dcb_config_tx_desc_arbiter_82599()
111 * Configure Tx descriptor plane (recycle mode; WSP) and in ixgbe_dcb_config_tx_desc_arbiter_82599()
121 * ixgbe_dcb_config_tx_data_arbiter_82599 - Config Tx Data arbiter
129 * Configure Tx Packet Arbiter and credits for each traffic class.
172 * Configure Tx packet plane (recycle mode; SP; arb delay) and in ixgbe_dcb_config_tx_data_arbiter_82599()
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H A Dixgbe_dcb_82598.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
10 * ixgbe_dcb_config_rx_arbiter_82598 - Config Rx data arbiter
67 * ixgbe_dcb_config_tx_desc_arbiter_82598 - Config Tx Desc. arbiter
74 * Configure Tx Descriptor Arbiter and credits for each traffic class.
113 * ixgbe_dcb_config_tx_data_arbiter_82598 - Config Tx data arbiter
120 * Configure Tx Data Arbiter and credits for each traffic class.
151 /* Enable Tx packet buffer division */ in ixgbe_dcb_config_tx_data_arbiter_82598()
160 * ixgbe_dcb_config_pfc_82598 - Config priority flow control
186 /* Configure PFC Tx thresholds per TC */ in ixgbe_dcb_config_pfc_82598()
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/linux/arch/arm64/boot/dts/qcom/
H A Dsa8540p-ride.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include "sa8540p-pmics.dtsi"
17 compatible = "qcom,sa8540p-ride", "qcom,sa8540p";
29 stdout-path = "serial0:115200n8";
34 regulators-0 {
35 compatible = "qcom,pm8150-rpmh-regulators";
36 qcom,pmic-id = "a";
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/linux/drivers/net/ethernet/intel/idpf/
H A Dvirtchnl2.h1 /* SPDX-License-Identifier: GPL-2.0-only */
16 * all the structures in this header follow little-endian format.
90 * enum virtchnl2_vport_type - Type of virtual port.
98 * enum virtchnl2_queue_model - Type of queue model.
108 * In the split queue model, hardware uses transmit completion queues to post
110 * descriptor queues to post descriptors to hardware.
112 * queue, while software uses receive buffer queues to post buffers to hardware.
230 * enum virtchnl2_action_types - Available actions for sideband flow steering
254 * enum virtchnl2_txq_sched_mode - Transmit Queue Scheduling Modes.
269 * enum virtchnl2_rxq_flags - Receive Queue Feature flags.
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H A Didpf_txrx.h1 /* SPDX-License-Identifier: GPL-2.0-only */
63 /* Data vector for NOIRQ queues */
72 * queues. E.g.: If you have two buffer queues of 512 descriptors and buffers,
75 * number of buffer queues to calculate how many descriptors each buffer queue
88 #define IDPF_RX_BUFQ_WORKING_SET(rxq) ((rxq)->desc_count - 1)
92 if (unlikely(++(ntc) == (rxq)->desc_count)) { \
100 if (unlikely(++(idx) == (q)->desc_count)) \
122 ((((txq)->next_to_clean > (txq)->next_to_use) ? 0 : (txq)->desc_count) + \
123 (txq)->next_to_clean - (txq)->next_to_use - 1)
125 #define IDPF_TX_COMPLQ_OVERFLOW_THRESH(txcq) ((txcq)->desc_count >> 1)
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H A Didpf_virtchnl.c1 // SPDX-License-Identifier: GPL-2.0-only
12 * struct idpf_vc_xn_manager - Manager for tracking transactions
26 * idpf_vid_to_vport - Translate vport id to vport pointer
39 if (adapter->vport_ids[i] == v_id) in idpf_vid_to_vport()
40 return adapter->vports[i]; in idpf_vid_to_vport()
46 * idpf_handle_event_link - Handle link event message
56 vport = idpf_vid_to_vport(adapter, le32_to_cpu(v2e->vport_id)); in idpf_handle_event_link()
58 dev_err_ratelimited(&adapter->pdev->dev, "Failed to find vport_id %d for link event\n", in idpf_handle_event_link()
59 v2e->vport_id); in idpf_handle_event_link()
62 np = netdev_priv(vport->netdev); in idpf_handle_event_link()
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/linux/tools/testing/selftests/drivers/net/
H A Dstats.py2 # SPDX-License-Identifier: GPL-2.0
24 def check_pause(cfg) -> None:
26 Check that drivers which support Pause config also report standard
31 ethnl.pause_get({"header": {"dev-index": cfg.ifindex}})
37 data = ethnl.pause_get({"header": {"dev-index": cfg.ifindex,
42 def check_fec(cfg) -> None:
44 Check that drivers which support FEC config also report standard
49 ethnl.fec_get({"header": {"dev-inde
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H A Dnetpoll_basic.py2 # SPDX-License-Identifier: GPL-2.0
8 the netpoll TX side.
11 suggested using a single RX/TX queue, pushing traffic to the NIC, and then
46 format="%(asctime)s - %(levelname)s - %(message)s",
49 NETCONSOLE_CONFIGFS_PATH: str = "/sys/kernel/config/netconsole"
67 def ethtool_get_ringsize(interface_name: str) -> tuple[int, int]:
72 ethtool_result = ethtool(f"-g {interface_name}", json=True)[0]
74 txs = ethtool_result["tx"]
77 f"Failed to read RX/TX ringsize: {exception}. Not going to mess with them."
83 def ethtool_set_ringsize(interface_name: str, ring_size: tuple[int, int]) -> bool:
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/linux/arch/arm/boot/dts/axis/
H A Dartpec6.dtsi2 * Device Tree Source for the Axis ARTPEC-6 SoC
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/interrupt-controller/arm-gic.h>
44 #include <dt-bindings/dma/nbpfaxi.h>
45 #include <dt-bindings/clock/axis,artpec6-clkctrl.h>
48 #address-cells = <1>;
49 #size-cells = <1>;
51 interrupt-parent = <&intc>;
54 #address-cells = <1>;
55 #size-cells = <0>;
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/linux/drivers/net/ethernet/intel/ice/
H A Dice.h1 /* SPDX-License-Identifier: GPL-2.0 */
19 #include <linux/dma-mapping.h>
89 #define ICE_MAX_NUM_DESC_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? \
115 #define ICE_MAX_RXQS_PER_TC 256 /* Used when setting VSI context per TC Rx queues */
125 #define ICE_MAX_MTU (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD)
133 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i]))
134 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i]))
135 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i]))
136 #define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i]))
162 for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++)
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/linux/drivers/net/ethernet/cadence/
H A Dmacb_main.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2004-2006 Atmel Corporation
10 #include <linux/clk-provider.h>
23 #include <linux/dma-mapping.h>
37 #include <linux/firmware/xlnx-zynqmp.h>
60 /* level of occupied TX descriptors under which we wake up TX process */
61 #define MACB_TX_WAKEUP_THRESH(bp) (3 * (bp)->tx_ring_size / 4)
72 …MAX_TX_LEN ((unsigned int)((1 << MACB_TX_FRMLEN_SIZE) - 1) & ~((unsigned int)(MACB_TX_LEN_ALIGN -…
73 /* Limit maximum TX length as per Cadence TSO errata. This is to avoid a
74 * false amba_error in TX path from the DMA assuming there is not enough
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/linux/drivers/net/caif/
H A Dcaif_virtio.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) ST-Ericsson AB 2013
21 #include <linux/dma-mapping.h>
33 /* Defaults used if virtio config space is unavailable */
41 /* struct cfv_napi_contxt - NAPI context info
46 * used to indicate invalid head-id.
53 /* struct cfv_stats - statistics for debugfs
58 * @tx_full_ring: Number times TX ring was full
59 * @tx_no_mem: Number of times TX went out of memory
60 * @tx_flow_on: Number of flow on (TX)
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/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mp-beacon-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
18 reg_wl_bt: regulator-wifi-bt {
19 compatible = "regulator-fixed";
20 pinctrl-names = "default";
21 pinctrl-0 = <&pinctrl_reg_wl_bt>;
22 regulator-name = "wl-bt-pow-dwn";
23 regulator-min-microvolt = <3300000>;
24 regulator-max-microvolt = <3300000>;
26 startup-delay-us = <70000>;
27 regulator-always-on;
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/linux/Documentation/networking/device_drivers/ethernet/freescale/dpaa2/
H A Doverview.rst16 DPAA2 is a hardware architecture designed for high-speeed network
23 DPAA2 hardware resources. The MC provides an object-based abstraction for
25 The MC uses DPAA2 hardware resources such as queues, buffer pools, and
28 The MC provides memory-mapped I/O command interfaces (MC portals)
34 +--------------------------------------+
38 +-----------------------------|--------+
41 | config,use,destroy)
44 +------------------------| mc portal |-+
46 | +- - - - - - - - - - - - -V- - -+ |
50 | +- - - - - - - - - - - - - - - -+ |
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/linux/drivers/net/ethernet/google/gve/
H A Dgve_main.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Copyright (C) 2015-2024 Google LLC
34 #define GVE_VERSION_PREFIX "GVE-"
49 driver_info = dma_alloc_coherent(&priv->pdev->dev, in gve_verify_driver_compatibility()
53 return -ENOMEM; in gve_verify_driver_compatibility()
67 strscpy(driver_info->os_version_str1, utsname()->release, in gve_verify_driver_compatibility()
68 sizeof(driver_info->os_version_str1)); in gve_verify_driver_compatibility()
69 strscpy(driver_info->os_version_str2, utsname()->version, in gve_verify_driver_compatibility()
70 sizeof(driver_info->os_version_str2)); in gve_verify_driver_compatibility()
77 if (err == -EOPNOTSUPP) in gve_verify_driver_compatibility()
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/linux/Documentation/networking/
H A Dnapi.rst1 .. SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
23 of event (packet Rx and Tx) processing.
30 of the NAPI instance while the method is the driver-specific event
31 handler. The method will typically free Tx packets that have been
37 -----------
55 ------------
64 argument - drivers can process completions for any number of Tx
71 skb Tx processing should happen regardless of the ``budget``, but if
77 skb Tx completions and no Rx or XDP packets.
96 or return ``budget - 1``.
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/linux/arch/riscv/boot/dts/sophgo/
H A Dcv180x.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 #include <dt-bindings/clock/sophgo,cv1800.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include "cv18xx-reset.h"
13 #address-cells = <1>;
14 #size-cells = <1>;
17 compatible = "fixed-clock";
18 clock-output-names = "osc_25m";
19 #clock-cells = <0>;
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/linux/arch/arm64/boot/dts/rockchip/
H A Drk3568.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "rk356x-base.dtsi"
11 cpu0_opp_table: opp-table-0 {
12 compatible = "operating-points-v2";
13 opp-shared;
15 opp-408000000 {
16 opp-hz = /bits/ 64 <408000000>;
17 opp-microvolt = <850000 850000 1150000>;
18 clock-latency-ns = <40000>;
21 opp-600000000 {
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/linux/arch/arm/boot/dts/ti/keystone/
H A Dkeystone-k2hk-netcp.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com/
9 compatible = "ti,keystone-navigator-qmss";
10 dma-coherent;
11 #address-cells = <1>;
12 #size-cells = <1>;
15 queue-range = <0 0x4000>;
20 #address-cells = <1>;
21 #size-cells = <1>;
24 managed-queues = <0 0x2000>;
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/linux/drivers/net/ethernet/cavium/thunder/
H A Dnicvf_main.c1 // SPDX-License-Identifier: GPL-2.0-only
37 #define MAX_XDP_MTU (1530 - ETH_HLEN - VLAN_HLEN * 2)
77 if (nic->sqs_mode) in nicvf_netdev_qidx()
78 return qidx + ((nic->sqs_id + 1) * MAX_CMP_QUEUES_PER_QS); in nicvf_netdev_qidx()
95 writeq_relaxed(val, nic->reg_base + offset); in nicvf_reg_write()
100 return readq_relaxed(nic->reg_base + offset); in nicvf_reg_read()
106 void __iomem *addr = nic->reg_base + offset; in nicvf_queue_reg_write()
113 void __iomem *addr = nic->reg_base + offset; in nicvf_queue_reg_read()
118 /* VF -> PF mailbox communication */
132 mutex_lock(&nic->rx_mode_mtx); in nicvf_send_msg_to_pf()
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