/freebsd/sys/contrib/device-tree/Bindings/net/ |
H A D | ibm,emac.txt | 8 correct clock-frequency property. 13 - device_type : "network" 15 - compatible : compatible list, contains 2 entries, first is 16 "ibm,emac-CHIP" where CHIP is the host ASIC (440gx, 18 "ibm,emac4". For Axon, thus, we have: "ibm,emac-axon", 20 - interrupts : <interrupt mapping for EMAC IRQ and WOL IRQ> 21 - reg : <registers mapping> 22 - local-mac-address : 6 bytes, MAC address 23 - mal-device : phandle of the associated McMAL node 24 - mal-tx-channel : 1 cell, index of the tx channel on McMAL associated [all …]
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H A D | altera_tse.txt | 1 * Altera Triple-Speed Ethernet MAC driver (TSE) 4 - compatible: Should be "altr,tse-1.0" for legacy SGDMA based TSE, and should 5 be "altr,tse-msgdma-1.0" for the preferred MSGDMA based TSE. 8 - reg: Address and length of the register set for the device. It contains 9 the information of registers in the same order as described by reg-names 10 - reg-names: Should contain the reg names 12 "tx_csr": xDMA Tx dispatcher control and status space region 13 "tx_desc": MSGDMA Tx dispatcher descriptor space region 18 - interrupts: Should contain the TSE interrupts and its mode. 19 - interrupt-names: Should contain the interrupt names [all …]
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H A D | altr,tse.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Maxime Chevallier <maxime.chevallier@bootlin.com> 15 - const: altr,tse-1.0 16 - const: ALTR,tse-1.0 18 - const: altr,tse-msgdma-1.0 23 interrupt-names: 25 - const: rx_irq 26 - const: tx_irq [all …]
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H A D | ethernet-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/net/ethernet-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - David S. Miller <davem@davemloft.net> 19 local-mac-address: 22 $ref: /schemas/types.yaml#/definitions/uint8-array 26 mac-address: 31 local-mac-address property. 32 $ref: /schemas/types.yaml#/definitions/uint8-array [all …]
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/freebsd/sys/dev/gve/ |
H A D | gve_tx.c | 1 /*- 2 * SPDX-License-Identifier: BSD-3-Clause 4 * Copyright (c) 2023-2024 Google LLC 38 gve_tx_fifo_init(struct gve_priv *priv, struct gve_tx_ring *tx) in gve_tx_fifo_init() argument 40 struct gve_queue_page_list *qpl = tx->com.qpl; in gve_tx_fifo_init() 41 struct gve_tx_fifo *fifo = &tx->fifo; in gve_tx_fifo_init() local 43 fifo->size = qpl->num_pages * PAGE_SIZE; in gve_tx_fifo_init() 44 fifo->base = qpl->kva; in gve_tx_fifo_init() 45 atomic_store_int(&fifo->available, fifo->size); in gve_tx_fifo_init() 46 fifo->head = 0; in gve_tx_fifo_init() [all …]
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/freebsd/sys/contrib/device-tree/src/powerpc/ |
H A D | mpc5121.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 5 * Copyright 2007-2008 Freescale Semiconductor Inc. 8 #include <dt-bindings/clock/mpc512x-clock.h> 10 /dts-v1/; 15 #address-cell [all...] |
H A D | eiger.dts | 11 /dts-v1/; 14 #address-cells = <2>; 15 #size-cells = <1>; 18 dcr-parent = <&{/cpus/cpu@0}>; 30 #address-cells = <1>; 31 #size-cells = <0>; 37 clock-frequency = <0>; /* Filled in by U-Boot */ 38 timebase-frequency = <0>; /* Filled in by U-Boot */ 39 i-cache-line-size = <32>; 40 d-cache-line-size = <32>; [all …]
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H A D | arches.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 17 /dts-v1/; 20 #address-cells = <2>; 21 #size-cells = <1>; 24 dcr-parent = <&{/cpus/cpu@0}>; 34 #address-cells = <1>; 35 #size-cells = <0>; 41 clock-frequency = <0>; /* Filled in by U-Boot */ 42 timebase-frequency = <0>; /* Filled in by U-Boot */ 43 i-cache-line-size = <32>; [all …]
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H A D | obs600.dts | 8 * Copyright 2007-2009 DENX Software Engineering, Stefan Roese <sr@denx.de> 15 /dts-v1/; 18 #address-cells = <1>; 19 #size-cells = <1>; 22 dcr-parent = <&{/cpus/cpu@0}>; 32 #address-cells = <1>; 33 #size-cells = <0>; 39 clock-frequency = <0>; /* Filled in by U-Boot */ 40 timebase-frequency = <0>; /* Filled in by U-Boot */ 41 i-cache-line-size = <32>; [all …]
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H A D | glacier.dts | 4 * Copyright 2008-2010 DENX Software Engineering, Stefan Roese <sr@denx.de> 11 /dts-v1/; 14 #address-cells = <2>; 15 #size-cells = <1>; 18 dcr-parent = <&{/cpus/cpu@0}>; 30 #address-cells = <1>; 31 #size-cells = <0>; 37 clock-frequency = <0>; /* Filled in by U-Boot */ 38 timebase-frequency = <0>; /* Filled in by U-Boot */ 39 i-cache-line-size = <32>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/microchip/ |
H A D | sam9x60.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * sam9x60.dtsi - Device Tree Include file for Microchip SAM9X60 SoC 10 #include <dt-bindings/dma/at91.h> 11 #include <dt-bindings/pinctrl/at91.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/clock/at91.h> 15 #include <dt-bindings/mfd/at91-usart.h> 16 #include <dt-bindings/mfd/atmel-flexcom.h> 19 #address-cells = <1>; [all …]
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H A D | sama5d2.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * sama5d2.dtsi - Device Tree Include file for SAMA5D2 family SoC 9 #include <dt-bindings/dma/at91.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/clock/at91.h> 12 #include <dt-bindings/mfd/at91-usar [all...] |
H A D | lan966x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * lan966x.dtsi - Device Tree Include file for Microchip LAN966 family SoC 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/mfd/atmel-flexcom.h> 14 #include <dt-bindings/dma/at91.h> 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/clock/microchip,lan966x.h> 21 interrupt-parent = <&gic>; 22 #address-cells = <1>; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/powerpc/fsl/ |
H A D | mpc5121-psc.txt | 4 ---------------- 7 are specified by fsl,mpc5121-psc-uart nodes in the 8 fsl,mpc5121-immr SoC node. Additionally the PSC FIFO 9 Controller node fsl,mpc5121-psc-fifo is required there: 11 fsl,mpc512x-psc-uart nodes 12 -------------------------- 15 - compatible : Should contain "fsl,<soc>-psc-uart" and "fsl,<soc>-psc" 17 - reg : Offset and length of the register set for the PSC device 18 - interrupts : <a b> where a is the interrupt number of the 19 PSC FIFO Controller and b is a field that represents an [all …]
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/freebsd/sys/dev/cas/ |
H A D | if_casreg.h | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 30 * from: FreeBSD: if_gemreg.h 174987 2007-12-30 01:32:03Z marius 84 * Bits 0-9 of CAS_STATUS auto-clear when read. CAS_CLEAR_ALIAS specifies 85 * which of bits 0-9 auto-clear when reading CAS_STATUS_ALIAS. 88 #define CAS_INTR_TX_ALL 0x00000002 /* TX frames trans. to FIFO. */ 89 #define CAS_INTR_TX_DONE 0x00000004 /* Any TX frame transferred. */ 90 #define CAS_INTR_TX_TAG_ERR 0x00000008 /* TX FIFO tag corrupted. */ 93 #define CAS_INTR_RX_TAG_ERR 0x00000040 /* RX FIFO tag corrupted. */ 100 #define CAS_INTR_TX_MAC_INT 0x00004000 /* TX MAC interrupt */ [all …]
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/freebsd/sys/contrib/device-tree/Bindings/spi/ |
H A D | spi-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/spi/spi-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Mark Brown <broonie@kernel.org> 20 pattern: "^spi(@.*|-([0-9]|[1-9][0-9]+))?$" 22 "#address-cells": 25 "#size-cells": 28 cs-gpios: 32 increased automatically with max(cs-gpios, hardware chip selects). [all …]
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/freebsd/sys/contrib/alpine-hal/ |
H A D | al_hal_udma_regs_m2s.h | 1 /*- 10 found at http://www.gnu.org/licenses/gpl-2.0.html 84 * 00 - No pending tasks 98 * 0 - Log is enabled. 99 * 1 - Log is masked. 125 /* [0x28] M2S data FIFO status */ 127 /* [0x2c] M2S header FIFO status */ 129 /* [0x30] M2S unack FIFO status */ 134 * [0x38] M2S prefetch FIFO status. 139 * [0x3c] M2S completion FIFO status. [all …]
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/freebsd/sys/contrib/device-tree/Bindings/mmc/ |
H A D | synopsys-dw-mshc-common.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mmc/synopsys-dw-mshc-common.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - $ref: mmc-controller.yaml# 13 - Ulf Hansson <ulf.hansson@linaro.org> 20 reset-names: 23 clock-frequency: 29 fifo-depth: 31 The maximum size of the tx/rx fifo's. If this property is not [all …]
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/freebsd/sys/contrib/device-tree/Bindings/mfd/ |
H A D | atmel-usart.txt | 4 - compatible: Should be one of the following: 5 - "atmel,at91rm9200-usart" 6 - "atmel,at91sam9260-usart" 7 - "microchip,sam9x60-usart" 8 - "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart" 9 - "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart" 10 - "microchip,sam9x60-dbgu", "microchip,sam9x60-usart" 11 - reg: Should contain registers location and length 12 - interrupts: Should contain interrupt 13 - clock-names: tuple listing input clock names. [all …]
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/freebsd/sys/contrib/device-tree/Bindings/net/can/ |
H A D | xilinx_can.txt | 2 --------------------------------------------------------- 5 - compatible : Should be: 6 - "xlnx,zynq-can-1.0" for Zynq CAN controllers 7 - "xlnx,axi-can-1.00.a" for Axi CAN controllers 8 - "xlnx,canfd-1.0" for CAN FD controllers 9 - "xlnx,canfd-2.0" for CAN FD 2.0 controllers 10 - reg : Physical base address and size of the controller 12 - interrupts : Property with a value describing the interrupt 14 - clock-names : List of input clock names 15 - "can_clk", "pclk" (For CANPS), [all …]
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/freebsd/sys/contrib/device-tree/Bindings/usb/ |
H A D | dwc2.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Rob Herring <robh@kernel.org> 13 - $ref: usb-drd.yaml# 14 - $ref: usb-hcd.yaml# 19 - const: brcm,bcm2835-usb 20 - const: hisilicon,hi6220-usb 21 - const: ingenic,jz4775-otg 22 - const: ingenic,jz4780-otg [all …]
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H A D | snps,dwc3.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Felipe Balbi <balbi@kernel.org> 14 be presented as a standalone DT node with an optional vendor-specific 18 - $ref: usb-drd.yaml# 19 - if: 25 - dr_mode 29 $ref: usb-xhci.yaml# 35 - const: snps,dwc3 [all …]
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/freebsd/sys/contrib/device-tree/src/arm/broadcom/ |
H A D | bcm283x-rpi-usb-otg.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 g-rx-fifo-size = <256>; 5 g-np-tx-fifo-size = <32>; 8 * fifo sizes shouldn't exceed 3776 bytes. 10 g-tx-fifo-size = <256 256 512 512 512 768 768>;
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/freebsd/sys/contrib/device-tree/Bindings/serial/ |
H A D | atmel,at91-usart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/serial/atmel,at91-usart.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Richard Genoud <richard.genoud@bootlin.com> 16 - enum: 17 - atmel,at91rm9200-usart 18 - atmel,at91sam9260-usart 19 - items: 20 - const: atmel,at91rm9200-dbgu [all …]
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/freebsd/sys/contrib/dev/iwlwifi/fw/ |
H A D | error-dump.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 3 * Copyright (C) 2014, 2018-2024 Intel Corporation 4 * Copyright (C) 2014-2015 Intel Mobile Communications GmbH 5 * Copyright (C) 2016-2017 Intel Deutschland GmbH 17 * enum iwl_fw_error_dump_type - types of data in the dump file 18 * @IWL_FW_ERROR_DUMP_CSR: Control Status Registers - fro 275 u32 size; global() member [all...] |