| /freebsd/share/man/man4/ |
| H A D | ena.4 | 1 .\" SPDX-License-Identifier: BSD-2-Clause
3 .\" Copyright (c) 2015-2024 Amazon.com, Inc. or its affiliates.
40 .Bd -ragged -offset indent
41 .Cd "device ena"
47 .Bd -literal -offset indent
54 The ENA device exposes a lightweight management interface with a
58 The driver supports a range of ENA devices, is link-speed independent
62 Some ENA devices support SR-IOV.
63 This driver is used for both the SR-IOV Physical Function (PF) and Virtual
67 processing by providing multiple Tx/Rx queue pairs (the maximum number
[all …]
|
| H A D | xl.4 | 15 .\" 4. Neither the name of the author nor the names of any co-contributors
36 .Nd "3Com Etherlink XL and Fast Etherlink XL Ethernet device driver"
41 .Bd -ragged -offset indent
42 .Cd "device miibus"
43 .Cd "device xl"
49 .Bd -literal -offset indent
57 and "tornado" bus-master Etherlink XL chips.
59 The Etherlink XL chips support built-in 10baseT, 10base2 and 10base5
63 NS 83840A 10/100 PHY for 10/100 Mbps support in full or half-duplex.
64 The 3c905B adapters have built-in autonegotiation logic mapped onto
[all …]
|
| H A D | rl.4 | 15 .\" 4. Neither the name of the author nor the names of any co-contributors
36 .Nd "RealTek 8129/8139 Fast Ethernet device driver"
41 .Bd -ragged -offset indent
42 .Cd "device miibus"
43 .Cd "device rl"
49 .Bd -literal -offset indent
60 descriptor-based data transfer mechanism.
85 .Bl -tag -width xxxxxxxxxxxxxxxxxxxx
100 .Ar full-duplex
102 .Ar half-duplex
[all …]
|
| H A D | aue.4 | 15 .\" 4. Neither the name of the author nor the names of any co-contributors
41 .Bd -ragged -offset indent
42 .Cd "device uhci"
43 .Cd "device ohci"
44 .Cd "device usb"
45 .Cd "device miibus"
46 .Cd "device uether"
47 .Cd "device aue"
53 .Bd -literal -offset indent
63 will operate at 100Base-TX and full-duplex.
[all …]
|
| H A D | gve.4 | 1 .\" SPDX-License-Identifier: BSD-3-Clause
3 .\" Copyright (c) 2023-2024 Google LLC
39 .Bd -ragged -offset indent
40 .Cd "device gve"
46 .Bd -literal -offset indent
51 It is required to support per-VM Tier-1 networking performance, and for using certain VM shapes on …
57 .Bl -bullet -compact
72 For more information on configuring this device, see
76 binds to a single PCI device ID presented by gVNIC:
78 .Bl -bullet -compact
[all …]
|
| H A D | vte.4 | 35 .Bd -ragged -offset indent
36 .Cd "device miibus"
37 .Cd "device vte"
43 .Bd -literal -offset indent
49 device driver provides support for RDC R6040 Fast Ethernet controller
53 or half-duplex.
54 The controller supports interrupt moderation mechanism, a 64-bit multicast
55 hash filter, VLAN over-size frame and four station addresses.
58 device driver uses three station addresses out of four as perfect
64 .Bl -tag -width ".Cm 10baseT/UTP"
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/display/bridge/ |
| H A D | dw_hdmi.txt | 1 Synopsys DesignWare HDMI TX Encoder
4 This document defines device tree properties for the Synopsys DesignWare HDMI
5 TX Encoder (DWC HDMI TX). It doesn't constitue a device tree binding
6 specification by itself but is meant to be referenced by platform-specific
7 device tree bindings.
9 When referenced from platform device tree bindings the properties defined in
10 this document are defined as follows. The platform device tree bindings are
13 - reg: Memory mapped base address and length of the DWC HDMI TX registers.
15 - reg-io-width: Width of the registers specified by the reg property. The
19 - interrupts: Reference to the DWC HDMI TX interrupt.
[all …]
|
| H A D | synopsys,dw-hdmi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/synopsys,dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Common Properties for Synopsys DesignWare HDMI TX Controller
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
13 This document defines device tree properties for the Synopsys DesignWare HDMI
14 TX controller (DWC HDMI TX) IP core. It doesn't constitute a full device tree
15 binding specification by itself but is meant to be referenced by device tree
16 bindings for the platform-specific integrations of the DWC HDMI TX.
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/net/ |
| H A D | ibm,emac.txt | 8 correct clock-frequency property.
13 - device_type : "network"
15 - compatible : compatible list, contains 2 entries, first is
16 "ibm,emac-CHIP" where CHIP is the host ASIC (440gx,
18 "ibm,emac4". For Axon, thus, we have: "ibm,emac-axon",
20 - interrupts : <interrupt mapping for EMAC IRQ and WOL IRQ>
21 - reg : <registers mapping>
22 - local-mac-address : 6 bytes, MAC address
23 - mal-device : phandle of the associated McMAL node
24 - mal-tx-channel : 1 cell, index of the tx channel on McMAL associated
[all …]
|
| H A D | ethernet-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - David S. Miller <davem@davemloft.net>
19 local-mac-address:
21 Specifies the MAC address that was assigned to the network device.
22 $ref: /schemas/types.yaml#/definitions/uint8-array
26 mac-address:
30 to the device by the boot program is different from the
[all …]
|
| H A D | xilinx_axienet.txt | 1 XILINX AXI ETHERNET Device Tree Bindings
2 --------------------------------------------------------
7 segments of memory for buffering TX and RX, as well as the capability of
8 offloading TX/RX checksum calculation off the processor.
18 - compatible : Must be one of "xlnx,axi-ethernet-1.00.a",
19 "xlnx,axi-ethernet-1.01.a", "xlnx,axi-ethernet-2.01.a"
20 - reg : Address and length of the IO space, as well as the address
22 axistream-connected is specified, in which case the reg
24 - interrupts : Should be a list of 2 or 3 interrupts: TX DMA, RX DMA,
25 and optionally Ethernet core. If axistream-connected is
[all …]
|
| H A D | keystone-netcp.txt | 1 This document describes the device tree bindings associated with the
6 switch sub-module to send and receive packets. NetCP also includes a packet
13 includes a 3-port Ethernet switch sub-module capable of 10Gb/s and 1Gb/s rates
16 Keystone NetCP driver has a plug-in module architecture where each of the NetCP
17 sub-modules exist as a loadable kernel module which plug in to the netcp core.
18 These sub-modules are represented as "netcp-devices" in the dts bindings. It is
19 mandatory to have the ethernet switch sub-module for the ethernet interface to
20 be operational. Any other sub-module like the PA is optional.
24 -----------------------------
26 -----------------------------
[all …]
|
| H A D | micrel-ksz90x1.txt | 5 device node. Deprecated, but still supported, these properties can
6 also be added to an Ethernet OF device node.
8 Note that these settings are applied after any phy-specific fixup from
17 skew values actually increase in 120ps steps, starting from -840ps. The
20 change the driver now because of the many existing device trees that have
27 Device Tree Value Delay Pad Skew Register Value
28 -----------------------------------------------------
29 0 -840ps 0000
30 200 -720ps 0001
31 400 -600ps 0010
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/display/msm/ |
| H A D | hdmi.txt | 4 - compatible: one of the following
5 * "qcom,hdmi-tx-8996"
6 * "qcom,hdmi-tx-8994"
7 * "qcom,hdmi-tx-8084"
8 * "qcom,hdmi-tx-8974"
9 * "qcom,hdmi-tx-8660"
10 * "qcom,hdmi-tx-8960"
11 - reg: Physical base address and length of the controller's registers
12 - reg-names: "core_physical"
13 - interrupts: The interrupt signal from the hdmi block.
[all …]
|
| /freebsd/sys/dev/isci/scil/ |
| H A D | scu_bios_definitions.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
9 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
22 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
28 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
64 * stand-alone where the library is excluded. By excluding
208 * in APC mode, if ANY of the phy mask is non-zero,
230 * Spread Spectrum Clocking (SSC) setting for Tx:
303 * AFE XCVR Tx Amplitude and Equalization Control Register Set
306 * Operational Note: The following Look-Up-Table registers are engaged
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/mailbox/ |
| H A D | omap-mailbox.txt | 17 and tx interrupt source per h/w fifo. Communication between different processors
18 is achieved through the appropriate programming of the rx and tx interrupt
25 routed to different processor sub-systems on DRA7xx as they are routed through
35 Mailbox Device Node:
37 A Mailbox device node is used to represent a Mailbox IP instance/cluster within
38 a SoC. The sub-mailboxes are represented as child nodes of this parent node.
41 --------------------
42 - compatible: Should be one of the following,
43 "ti,omap2-mailbox" for OMAP2420, OMAP2430 SoCs
44 "ti,omap3-mailbox" for OMAP3430, OMAP3630 SoCs
[all …]
|
| H A D | ti,omap-mailbox.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/ti,omap-mailbo
[all...] |
| /freebsd/sys/dev/ice/ |
| H A D | ice_iflib_recovery_txrx.c | 1 /* SPDX-License-Identifier: BSD-3-Clause */
34 * @brief iflib Tx/Rx ops for recovery mode
39 * receive when the device is in firmware recovery mode.
57 * @brief Tx/Rx operations for recovery mode
59 * Similar to ice_txrx, but contains pointers to functions which are no-ops.
74 * ice_recovery_txd_encap - prepare Tx descriptor
[all...] |
| /freebsd/sys/contrib/device-tree/Bindings/sound/ |
| H A D | qcom,wcd937x-sdw.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/qcom,wcd937x-sdw.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 Qualcomm WCD9370/WCD9375 Codec is a standalone Hi-Fi audio codec IC.
14 It has RX and TX Soundwire slave devices. This bindings is for the
24 qcom,tx-port-mapping:
26 Specifies static port mapping between device and host tx ports.
27 In the order of the device port index which are adc1_port, adc23_port,
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/spi/ |
| H A D | spi-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mark Brown <broonie@kernel.org>
13 SPI busses can be described with a node for the SPI controller device
20 pattern: "^spi(@.*|-([0-9]|[1-9][0-9]+))?$"
22 "#address-cells":
25 "#size-cells":
28 cs-gpios:
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/soc/fsl/cpm_qe/qe/ |
| H A D | ucc.txt | 4 - device_type : should be "network", "hldc", "uart", "transparent"
6 - compatible : could be "ucc_geth" or "fsl_atm" and so on.
7 - cell-index : the ucc number(1-8), corresponding to UCCx in UM.
8 - reg : Offset and length of the register set for the device
9 - interrupts : <a b> where a is the interrupt number and b is a
14 - pio-handle : The phandle for the Parallel I/O port configuration.
15 - port-number : for UART drivers, the port number to use, between 0 and 3.
16 This usually corresponds to the /dev/ttyQE device, e.g. <0> = /dev/ttyQE0.
17 The port number is added to the minor number of the device. Unlike the
18 CPM UART driver, the port-number is required for the QE UART driver.
[all …]
|
| /freebsd/sys/contrib/dev/iwlwifi/ |
| H A D | iwl-config.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2005-2014, 2018-2021 Intel Corporation
4 * Copyright (C) 2016-2017 Intel Deutschland GmbH
5 * Copyright (C) 2018-2024 Intel Corporation
15 #include "iwl-cs
504 u16 device; global() member
[all...] |
| H A D | iwl-fh.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2005-2014, 2018-2021, 2023-2024 Intel Corporation
4 * Copyright (C) 2015-2017 Intel Deutschland GmbH
12 #include "iwl-tran
[all...] |
| /freebsd/sys/dev/rl/ |
| H A D | if_rlreg.h | 1 /*-
2 * Copyright (c) 1997, 1998-2003
16 * 4. Neither the name of the author nor the names of any co-contributors
37 #define RL_IDR1 0x0001 /* Must use 32-bit accesses (?) */
42 /* 0006-0007 reserved */
52 #define RL_TXSTAT0 0x0010 /* status of TX descriptor 0 */
53 #define RL_TXSTAT1 0x0014 /* status of TX descriptor 1 */
54 #define RL_TXSTAT2 0x0018 /* status of TX descriptor 2 */
55 #define RL_TXSTAT3 0x001C /* status of TX descriptor 3 */
57 #define RL_TXADDR0 0x0020 /* address of TX descriptor 0 */
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/phy/ |
| H A D | phy-miphy365x.txt | 4 This binding describes a miphy device that is used to control PHY hardware
8 - compatible : Should be "st,miphy365x-phy"
9 - st,syscfg : Phandle / integer array property. Phandle of sysconfig group
11 an entry for each port sub-node, specifying the control
14 Required nodes : A sub-node is required for each channel the controller
16 'reg' and 'reg-names' properties are used inside these
21 - #phy-cells : Should be 1 (See second example)
22 Cell after port phandle is device type from:
23 - PHY_TYPE_SATA
24 - PHY_TYPE_PCI
[all …]
|