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/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dmxs-usb-phy.txt4 - compatible: should contain:
5 * "fsl,imx23-usbphy" for imx23 and imx28
6 * "fsl,imx6q-usbphy" for imx6dq and imx6dl
7 * "fsl,imx6sl-usbphy" for imx6sl
8 * "fsl,vf610-usbphy" for Vybrid vf610
9 * "fsl,imx6sx-usbphy" for imx6sx
10 * "fsl,imx7ulp-usbphy" for imx7ulp
11 * "fsl,imx8dxl-usbphy" for imx8dxl
12 "fsl,imx23-usbphy" is still a fallback for other strings
13 - reg: Should contain registers location and length
[all …]
H A Dfsl,mxs-usbphy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/fsl,mxs-usbphy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Xu Yang <xu.yang_2@nxp.com>
15 - enum:
16 - fsl,imx23-usbphy
17 - fsl,imx7ulp-usbphy
18 - fsl,vf610-usbphy
19 - items:
[all …]
/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_reset.c121 ahp->ah_hwp = HAL_TRUE_CHIP; in ar9300_attach_hw_platform()
126 * This includes: +USEC, TX/RX latency,
196 * Mask used to construct AAD for CCMP-AES in ar9300_init_mfp()
197 * Cisco spec defined bits 0-3 as mask in ar9300_init_mfp()
226 centers->ctl_center = centers->ext_center = in ar9300_get_channel_centers()
227 centers->synth_center = ichan->channel; in ar9300_get_channel_centers()
238 centers->synth_center = ichan->channel + HT40_CHANNEL_CENTER_SHIFT; in ar9300_get_channel_centers()
241 centers->synth_center = ichan->channel - HT40_CHANNEL_CENTER_SHIFT; in ar9300_get_channel_centers()
242 extoff = -1; in ar9300_get_channel_centers()
245 centers->ctl_center = in ar9300_get_channel_centers()
[all …]
H A Dar9300.h48 #define INIT_RSSI_BEACON_WEIGHT 8 /* ave beacon rssi weight (0-16) */
51 * Various fifo fill before Tx start, in 64-byte units
55 #define MAX_TX_FIFO_THRESHOLD (( 4096 / 64) - 1)
151 * Per-channel ANI state private to the driver.
178 u_int32_t cycle_count; /* Last cycle_count (can detect wrap-around) */
195 ((AH9300(ah)->ah_proc_phy_err & HAL_PROCESS_ANI))
211 u_int32_t ast_ani_reset; /* ANI parameters zero'd for non-STA */
317 (iniarray)->ia_array = (const u_int32_t *)(array); \
318 (iniarray)->ia_rows = (rows); \
319 (iniarray)->ia_columns = (columns); \
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6q-b650v3.dts5 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
45 #include "imx6q-bx50v3.dtsi"
49 compatible = "ge,imx6q-b650v3", "advantech,imx6q-ba16", "fsl,imx6q";
52 stdout-path = &uart3;
55 panel-lvds0 {
56 compatible = "innolux,g121x1-l03";
58 power-supply = <&reg_lvds>;
62 remote-endpoin
[all...]
H A Dimx6ull-dhcor-maveo-box.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 * DHCR-iMX6ULL-C080-R051-SPI-WBT-I-01LG
8 * DHCOR PCB number: 578-200 or newer
9 * maveo box PCB number: 525-200 or newer
12 /dts-v1/;
14 #include "imx6ull-dhcor-som.dtsi"
18 compatible = "marantec,imx6ull-dhcor-maveo-box", "dh,imx6ull-dhcor-som",
28 stdout-path = "serial0:115200n8";
31 reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
32 compatible = "regulator-fixed";
[all …]
H A Dimx6ul-14x14-evk.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/media/video-interfaces.h>
9 stdout-path = &uart1;
17 backlight_display: backlight-display {
18 compatible = "pwm-backlight";
20 brightness-levels = <0 4 8 16 32 64 128 255>;
21 default-brightness-level = <6>;
26 reg_sd1_vmmc: regulator-sd1-vmmc {
27 compatible = "regulator-fixed";
28 regulator-name = "VSD_3V3";
[all …]
H A Dimx6ull-uti260b.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 // Copyright (C) 2022-2024 Sebastian Reichel <sre@kernel.org>
4 /dts-v1/;
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/clock/imx6ul-clock.h>
9 #include <dt-bindings/leds/common.h>
12 model = "UNI-T UTi260B Thermal Camera";
13 compatible = "uni-t,uti260b", "fsl,imx6ull";
16 stdout-path = "serial0:115200n8";
[all …]
H A Dimx6ull-dhcom-som.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
6 #include "imx6ull-dhcor-som.dtsi"
10 /delete-property/ spi2;
11 /delete-property/ spi3;
28 stdout-path = "serial0:115200n8";
31 reg_ext_3v3_ref: regulator-ext-3v3-ref {
32 compatible = "regulator-fixed";
33 regulator-always-on;
34 regulator-max-microvolt = <3300000>;
35 regulator-min-microvolt = <3300000>;
[all …]
H A Dimx6qdl-var-som.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Support for Variscite VAR-SOM-MX6 Module
7 * Copyright (C) 2014-2016 Variscite, Ltd.
8 * Author: Donio Ron <ron.d@variscite.com>
12 /dts-v1/;
15 #include <dt-bindings/clock/imx6qdl-clock.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/sound/fsl-imx-audmux.h>
20 model = "Variscite VAR-SOM-MX6 module";
21 compatible = "variscite,var-som-imx6q", "fsl,imx6q";
[all …]
H A Dimx6ulz-bsh-smm-m2.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
13 compatible = "bsh,imx6ulz-bsh-smm-m2", "fsl,imx6ull", "fsl,imx6ulz";
16 stdout-path = &uart4;
19 usdhc2_pwrseq: usdhc2-pwrseq {
20 compatible = "mmc-pwrseq-simple";
21 reset-gpios = <&gpio2 21 GPIO_ACTIVE_LOW>;
26 pinctrl-names = "default";
27 pinctrl-0 = <&pinctrl_gpmi_nand>;
[all …]
H A Dimx6dl-yapp4-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (C) 2015-2018 Y Soft Corporation, a.s.
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/pwm/pwm.h>
20 compatible = "pwm-backlight";
22 brightness-levels = <0 32 64 128 255>;
23 default-brightness-level = <32>;
[all …]
H A Dimx6dl-yapp43-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/pwm/pwm.h>
20 compatible = "pwm-backlight";
22 brightness-levels = <0 32 64 128 255>;
23 default-brightness-level = <32>;
24 num-interpolated-steps = <8>;
[all …]
H A Dimx6sx-sdb.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
13 compatible = "fsl,imx6sx-sdb", "fsl,imx6sx";
16 stdout-path = &uart1;
24 backlight_display: backlight-display {
25 compatible = "pwm-backlight";
27 brightness-levels = <0 4 8 16 32 64 128 255>;
28 default-brightness-level = <6>;
[all …]
H A Dimx6q-pistachio.dts6 * This file is dual-licensed: you can use it either under the terms
45 /dts-v1/;
47 #include <dt-bindings/gpio/gpio.h>
48 #include <dt-bindings/input/input.h>
53 compatible = "nutsboard,imx6q-pistachio", "fsl,imx6q";
56 stdout-path = &uart4;
64 reg_3p3v: regulator-3p3v {
65 compatible = "regulator-fixed";
66 regulator-name = "3P3V";
67 regulator-min-microvolt = <3300000>;
[all …]
/freebsd/sys/contrib/dev/rtw88/
H A Drtw8821a.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
12 #include "tx.h"
21 static const s8 lna_gain_table[] = {15, -1, -17, 0, -30, -38}; in rtw8821a_cck_rx_pwr()
32 rx_pwr_all = lna_gain - 2 * vga_idx; in rtw8821a_cck_rx_pwr()
62 /* [31] = 0 --> Page C */ in rtw8821a_iqk_backup_rf()
77 /* [31] = 0 --> Page C */ in rtw8821a_iqk_restore_rf()
90 /* [31] = 0 --> Page C */ in rtw8821a_iqk_restore_afe()
97 /* [31] = 1 --> Page C1 */ in rtw8821a_iqk_restore_afe()
114 /* [31] = 0 --> Page C */ in rtw8821a_iqk_rx_fill()
126 /* [31] = 1 --> Page C1 */ in rtw8821a_iqk_tx_fill()
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8ulp-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
12 compatible = "fsl,imx8ulp-evk", "fsl,imx8ulp";
15 stdout-path = &lpuart5;
23 reserved-memory {
24 #address-cells = <2>;
25 #size-cells = <2>;
29 compatible = "shared-dma-pool";
32 linux,cma-default;
35 m33_reserved: noncacheable-section@a8600000 {
[all …]
/freebsd/sys/contrib/dev/mediatek/mt76/mt7915/
H A Deeprom.c1 // SPDX-License-Identifier: ISC
15 struct mt76_dev *mdev = &dev->mt76; in mt7915_eeprom_load_precal()
16 u8 *eeprom = mdev->eeprom.data; in mt7915_eeprom_load_precal()
17 u32 offs = is_mt7915(&dev->mt76) ? MT_EE_DO_PRE_CAL : MT_EE_DO_PRE_CAL_V2; in mt7915_eeprom_load_precal()
21 if (!dev->flash_mode || !val) in mt7915_eeprom_load_precal()
26 dev->cal = devm_kzalloc(mdev->dev, size, GFP_KERNEL); in mt7915_eeprom_load_precal()
27 if (!dev->cal) in mt7915_eeprom_load_precal()
28 return -ENOMEM; in mt7915_eeprom_load_precal()
30 offs = is_mt7915(&dev->mt76) ? MT_EE_PRECAL : MT_EE_PRECAL_V2; in mt7915_eeprom_load_precal()
32 ret = mt76_get_of_data_from_mtd(mdev, dev->cal, offs, size); in mt7915_eeprom_load_precal()
[all …]
/freebsd/sys/dev/ath/ath_hal/
H A Dah_regdomain.h1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * Copyright (c) 2005-2006 Atheros Communications, Inc.
66 ADHOC_PER_11D = 0x00000008, /* must receive 11d beacon */
67 LIMIT_FRAME_4MS = 0x00000020, /* 4msec tx burst limit */
94 disallow, noise floor cal needed,
97 disallow, noise floor cal needed,
105 a one-on-one mapping exists */
144 noise floor cal needed, etc) */
/freebsd/sys/dev/malo/
H A Dif_malohal.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
50 * a different regdomain and/or tx power setup).
67 uint16_t maxnum_tx_wcb; /* max # of tx descs per WCB */
81 * Supply tx/rx dma-related settings to the firmware.
85 uint32_t maxnum_txwcb; /* max # of tx descs per WCB */
101 uint32_t TxRetrySuccesses; /* tx success w/ 1 retry */
102 uint32_t TxMultipleRetrySuccesses;/* tx success w/ >1 retry */
103 uint32_t TxFailures; /* tx fail due to no ACK */
104 uint32_t RTSSuccesses; /* CTS rx'd for RTS */
[all …]
/freebsd/sys/contrib/device-tree/Bindings/input/
H A Dazoteq,iqs7222.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Azoteq IQS7222A/B/C/D Capacitive Touch Controller
10 - Jeff LaBundy <jeff@labundy.com>
21 - azoteq,iqs7222a
22 - azoteq,iqs7222b
23 - azoteq,iqs7222c
24 - azoteq,iqs7222d
29 irq-gpios:
[all …]
/freebsd/sys/dev/bwn/
H A Dif_bwn_phy_g.c1 /*-
2 * Copyright (c) 2009-2010 Weongyo Jeong <weongyo@freebsd.org>
143 if (mac->mac_phy.hwpctl == 0 || mac->mac_phy.use_hwpctl == NULL) in bwn_has_hwpctl()
145 return (mac->mac_phy.use_hwpctl(mac)); in bwn_has_hwpctl()
151 struct bwn_softc *sc = mac->mac_sc; in bwn_phy_g_attach()
152 struct bwn_phy *phy = &mac->mac_phy; in bwn_phy_g_attach()
153 struct bwn_phy_g *pg = &phy->phy_g; in bwn_phy_g_attach()
166 "%d\n", (_name), error); \ in bwn_phy_g_attach()
171 BWN_PHY_G_READVAR(sc->sc_dev, int8, BHND_NVAR_PA0ITSSIT, &bg); in bwn_phy_g_attach()
172 BWN_PHY_G_READVAR(sc->sc_dev, int16, BHND_NVAR_PA0B0, &pab0); in bwn_phy_g_attach()
[all …]
/freebsd/sys/contrib/dev/athk/ath10k/
H A Dcore.c1 // SPDX-License-Identifier: ISC
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
21 #include <linux/nvmem-consumer.h>
33 #include "wmi-ops.h"
65 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software");
473 * or 2x2 160Mhz, long-guard-interval.
523 * 1x1 160Mhz, long-guard-interval.
741 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx",
[all …]
/freebsd/sys/dev/ath/ath_hal/ar9002/
H A Dar9280_olc.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
50 HALDEBUG(ah, HAL_DEBUG_RESET, "%s: Setting up TX gain tables.\n", __func__); in ar9280olcInit()
53 AH9280(ah)->originalGain[i] = MS(OS_REG_READ(ah, in ar9280olcInit()
56 AH9280(ah)->PDADCdelta = 0; in ar9280olcInit()
87 while (pcdac > AH9280(ah)->originalGain[i] && in ar9280olcGetTxGainIndex()
88 i < (AR9280_TX_GAIN_TABLE_SIZE - 1)) in ar9280olcGetTxGainIndex()
122 * The TX gain table is adjusted depending upon the difference
124 * average TX power sample value. This value is only valid if
142 "%s: called: initPDADC=%d, currPDADC=%d\n", in ar9280olcTemperatureCompensation()
[all …]
/freebsd/sys/dev/ath/ath_hal/ar5212/
H A Dar5212.h1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2008 Atheros Communications, Inc.
50 #define HALF_RATE_USEC 19 /* ((40 / 2) - 1 ) */
51 #define QUARTER_RATE_USEC 9 /* ((40 / 4) - 1 ) */
66 /* Tx frame start to tx data start delay */
71 * Various fifo fill before Tx start, in 64-byte units
179 * Per-channel ANI state private to the driver.
193 (to detect wrap-around) */
[all …]

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