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/freebsd/sys/contrib/device-tree/Bindings/phy/ |
H A D | mxs-usb-phy.txt | 4 - compatible: should contain: 5 * "fsl,imx23-usbphy" for imx23 and imx28 6 * "fsl,imx6q-usbphy" for imx6dq and imx6dl 7 * "fsl,imx6sl-usbphy" for imx6sl 8 * "fsl,vf610-usbphy" for Vybrid vf610 9 * "fsl,imx6sx-usbphy" for imx6sx 10 * "fsl,imx7ulp-usbphy" for imx7ulp 11 * "fsl,imx8dxl-usbphy" for imx8dxl 12 "fsl,imx23-usbphy" is still a fallback for other strings 13 - reg: Should contain registers location and length [all …]
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H A D | fsl,mxs-usbphy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/fsl,mxs-usbphy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Xu Yang <xu.yang_2@nxp.com> 15 - enum: 16 - fsl,imx23-usbphy 17 - fsl,imx7ulp-usbphy 18 - fsl,vf610-usbphy 19 - items: [all …]
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/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/ |
H A D | imx6q-b650v3.dts | 5 * This file is dual-licensed: you can use it either under the terms 43 /dts-v1/; 45 #include "imx6q-bx50v3.dtsi" 49 compatible = "ge,imx6q-b650v3", "advantech,imx6q-ba16", "fsl,imx6q"; 52 stdout-path = &uart3; 55 panel-lvds0 { 56 compatible = "innolux,g121x1-l03"; 58 power-supply = <®_lvds>; 62 remote-endpoin [all...] |
H A D | imx6ull-tarragon-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 5 /dts-v1/; 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/leds/common.h> 9 #include <dt-bindings/pwm/pwm.h> 18 stdout-path = &uart4; 26 emmc_pwrseq: emmc-pwrseq { 27 compatible = "mmc-pwrseq-emmc"; 28 pinctrl-0 = <&pinctrl_emmc_rst>; 29 pinctrl-names = "default"; [all …]
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/freebsd/sys/dev/qlnx/qlnxe/ |
H A D | reg_addr.h | 2 * Copyright (c) 2017-2018 Cavium, Inc. 73 … Mask memory read Bit3 : Mask memory write Bit2 : Mask Completion Bit1 : Mask TX Bit0 : Mask RX 76 … 0x003824UL //Access:R DataWidth:0x20 // tx number of tlp sent 78 …- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl… 79 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea… 80 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn… 81 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea… 88 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of … 90 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E… 116 … (0x1<<9) // Fast back-to-back transaction ena… [all …]
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