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Searched full:twc (Results 1 – 9 of 9) sorted by relevance

/linux/arch/microblaze/boot/dts/
H A Dsystem.dts186 xlnx,twc-ps-mem-0 = <0x2af8>;
187 xlnx,twc-ps-mem-1 = <0x3a98>;
188 xlnx,twc-ps-mem-2 = <0x3a98>;
189 xlnx,twc-ps-mem-3 = <0x3a98>;
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dnvidia,tegra20-pinmux.yaml67 spi4, trace, twc, uarta, uartb, uartc, uartd, uarte, ulpi,
/linux/arch/powerpc/kernel/
H A Dhead_8xx.S235 /* Insert Guarded and Accessed flags into the TWC from the Linux PTE.
236 * It is bit 27 of both the Linux PTE and the TWC (at least
/linux/drivers/pinctrl/tegra/
H A Dpinctrl-tegra20.c1950 FUNCTION(twc),
2056 MUX_PG(dap2, DAP2, TWC, RSVD3, GMI, 0x14, 8, 0x88, 22, 0xa0, 12),
2129 MUX_PG(sdc, PWM, TWC, SDIO3, SPI3, 0x18, 1, 0x8c, 12, 0xac, 28),
/linux/drivers/clk/tegra/
H A Dclk-tegra20.c477 { .dev_id = "twc", .dt_id = TEGRA20_CLK_TWC },
763 …TEGRA_INIT_DATA_MUX("twc", mux_pllpcm_clkm, CLK_SOURCE_TWC, 16, TEGRA_PERIPH_ON_APB, TEGRA20…
/linux/arch/arm/boot/dts/nvidia/
H A Dtegra20-paz00.dts166 nvidia,function = "twc";
/linux/drivers/mtd/nand/raw/
H A Dstm32_fmc2_nand.c1465 * tHOLD_MEM > max(tRC, tWC) - (tSETUP_MEM + tWAIT) in stm32_fmc2_nfc_calc_timings()
1514 * tHOLD_ATT > tWC - (tSETUP_ATT + tWAIT) in stm32_fmc2_nfc_calc_timings()
H A Ddenali.c859 * tRP, tWP, tRHOH, tRC, tWC -> RDWR_EN_LO_CNT in denali_setup_interface()
/linux/drivers/mtd/nand/raw/atmel/
H A Dnand-controller.c1313 * The write cycle timing is directly matching tWC, but is also in atmel_smc_nand_prepare_smcconf()
1317 * NWE_CYCLE = max(tWC, NWE_SETUP + NWE_PULSE + NWE_HOLD) in atmel_smc_nand_prepare_smcconf()