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/linux/tools/testing/selftests/kvm/aarch64/
H A Darch_timer_edge_cases.c6 * - timers above the max TVAL value.
26 /* tval is a signed 32-bit int. */
357 static void test_timer_tval(enum arch_timer timer, int32_t tval, in test_timer_tval() argument
361 test_timer_xval(timer, (uint64_t) tval, TIMER_TVAL, wm, reset_state, in test_timer_tval()
387 static void test_tval_no_irq(enum arch_timer timer, int32_t tval, uint64_t usec, in test_tval_no_irq() argument
390 /* tval will be cast to an int32_t in test_xval_check_no_irq */ in test_tval_no_irq()
391 test_xval_check_no_irq(timer, (uint64_t) tval, usec, TIMER_TVAL, wm); in test_tval_no_irq()
460 * Set a timer for tval=delta_1_ms then reprogram it to
461 * tval=delta_2_ms. Check that we get the timer fired. There is no
506 int32_t tval = (int32_t) msec_to_cycles(test_args.wait_ms); in test_basic_functionality() local
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H A Darch_timer.c4 * CVAL and TVAL registers.
H A Dvpmu_counter_access.c182 "tval: 0x%lx; mask: 0x%lx; set_expected: %u", \
186 "tval: 0x%lx; mask: 0x%lx; set_expected: %u", \
/linux/arch/loongarch/kvm/
H A Dtimer.c83 * If oneshot timer is fired, CSR TVAL will be -1, there are two in kvm_restore_timer()
95 * and set CSR TVAL with -1 in kvm_restore_timer()
101 * timer interrupt, and CSR TVAL keeps unchanged with -1, it in kvm_restore_timer()
149 * If period timer is fired, CSR TVAL will be reloaded from CSR TCFG in _kvm_save_timer()
150 * If oneshot timer is fired, CSR TVAL will be -1 in _kvm_save_timer()
151 * Here judge one-shot timer fired by checking whether TVAL is larger in _kvm_save_timer()
/linux/drivers/pinctrl/
H A Dpinctrl-cy8c95x0.c611 DECLARE_BITMAP(tval, MAX_LINE); in cy8c95x0_write_regs_mask()
621 bitmap_andnot(tval, val, chip->shiftmask, MAX_LINE); in cy8c95x0_write_regs_mask()
622 bitmap_shift_left(tval, tval, 4, MAX_LINE); in cy8c95x0_write_regs_mask()
623 bitmap_replace(tval, tval, val, chip->shiftmask, BANK_SZ * 3); in cy8c95x0_write_regs_mask()
631 write_val = bitmap_get_value8(tval, i * BANK_SZ); in cy8c95x0_write_regs_mask()
647 DECLARE_BITMAP(tval, MAX_LINE); in cy8c95x0_read_regs_mask()
658 bitmap_andnot(tval, val, chip->shiftmask, MAX_LINE); in cy8c95x0_read_regs_mask()
659 bitmap_shift_left(tval, tval, 4, MAX_LINE); in cy8c95x0_read_regs_mask()
660 bitmap_replace(tval, tval, val, chip->shiftmask, BANK_SZ * 3); in cy8c95x0_read_regs_mask()
675 read_val |= bitmap_get_value8(tval, i * BANK_SZ) & ~bits; in cy8c95x0_read_regs_mask()
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/linux/tools/testing/selftests/kvm/include/aarch64/
H A Darch_timer.h82 static inline void timer_set_tval(enum arch_timer timer, int32_t tval) in timer_set_tval() argument
86 write_sysreg(tval, cntv_tval_el0); in timer_set_tval()
89 write_sysreg(tval, cntp_tval_el0); in timer_set_tval()
/linux/Documentation/devicetree/bindings/timer/
H A Darm,arch_timer.yaml75 affects writes to the tval register, due to the implicit counter read.
81 by back-to-back reads. This also affects writes to the tval register, due
89 the tval registers, due to the implicit counter read.
/linux/arch/arm/kernel/
H A Dmodule-plts.c113 u32 *tval = (u32 *)(base + rel->r_offset); in is_zero_addend_relocation() local
126 upper = __mem_to_opcode_thumb16(((u16 *)tval)[0]); in is_zero_addend_relocation()
127 lower = __mem_to_opcode_thumb16(((u16 *)tval)[1]); in is_zero_addend_relocation()
134 return (__mem_to_opcode_arm(*tval) & 0xffffff) == 0xfffffe; in is_zero_addend_relocation()
/linux/drivers/char/mwave/
H A D3780i.c195 unsigned short tval; in dsp3780I_EnableDSP() local
296 MKWORD(tval) = InWordDsp(DSP_IsaSlaveControl); in dsp3780I_EnableDSP()
299 "3780i::dsp3780i_EnableDSP rSlaveControl 2 %x\n", tval); in dsp3780I_EnableDSP()
308 MKWORD(tval) = InWordDsp(DSP_IsaSlaveControl); in dsp3780I_EnableDSP()
311 "3780i::dsp3780i_EnableDSP rSlaveControl 3 %x\n", tval); in dsp3780I_EnableDSP()
/linux/drivers/isdn/mISDN/
H A Dtei.c472 mISDN_FsmAddTimer(&tm->timer, tm->tval, EV_TIMER, NULL, 1); in tei_id_request()
592 mISDN_FsmAddTimer(&tm->timer, tm->tval, EV_TIMER, NULL, 2); in tei_id_verify()
607 mISDN_FsmAddTimer(&tm->timer, tm->tval, EV_TIMER, NULL, 3); in tei_id_req_tout()
626 mISDN_FsmAddTimer(&tm->timer, tm->tval, EV_TIMER, NULL, 4); in tei_id_ver_tout()
690 mISDN_FsmAddTimer(&tm->timer, tm->tval, EV_TIMER, NULL, 2); in tei_id_chk_req_net()
742 mISDN_FsmAddTimer(&tm->timer, tm->tval, EV_TIMER, NULL, 4); in tei_id_ver_tout_net()
819 l2->tm->tval = 2000; /* T202 2 sec */ in create_new_tei()
1063 l2->tm->tval = 1000; /* T201 1 sec */ in create_teimgr()
1071 l2->tm->tval = 2000; /* T202 2 sec */ in create_teimgr()
H A Dlayer2.h33 int tval, nval; member
/linux/drivers/tty/serial/8250/
H A D8250_bcm7271.c561 u32 tval; in brcmuart_isr() local
575 tval = UDMA_IS_TX_INTERRUPT(interrupts); in brcmuart_isr()
576 if (tval) in brcmuart_isr()
577 brcmuart_tx_isr(up, tval); in brcmuart_isr()
578 if ((rval | tval) == 0) in brcmuart_isr()
/linux/drivers/power/supply/
H A Dbq27xxx_battery.c1747 int tval; local
1749 tval = bq27xxx_read(di, reg, false);
1750 if (tval < 0) {
1752 reg, tval);
1753 return tval;
1756 if (tval == 65535)
1759 val->intval = tval * 60;
/linux/drivers/rapidio/switches/
H A Didtcps.c143 /* set TVAL = ~50us */ in idtcps_probe()
H A Didt_gen3.c207 /* set TVAL = ~50us */ in idtg3_em_init()
H A Didt_gen2.c314 /* set TVAL = ~50us */ in idtg2_em_init()
/linux/drivers/clocksource/
H A Darm_arch_timer.c833 * XGene-1 implements CVAL in terms of TVAL, meaning in __arch_timer_check_delta()
836 * Note that TVAL is signed, thus has only 31 of its in __arch_timer_check_delta()
846 pr_warn_once("Broken CNTx_CVAL_EL1, using 31 bit TVAL instead.\n"); in __arch_timer_check_delta()
/linux/net/ipv4/
H A Ddevinet.c1750 long tval = (jiffies - tstamp) / HZ; in inet_fill_ifaddr() local
1752 if (preferred > tval) in inet_fill_ifaddr()
1753 preferred -= tval; in inet_fill_ifaddr()
1757 if (valid > tval) in inet_fill_ifaddr()
1758 valid -= tval; in inet_fill_ifaddr()
/linux/Documentation/translations/zh_TW/arch/loongarch/
H A Dintroduction.rst127 0x42 定時器值 TVAL
/linux/Documentation/translations/zh_CN/arch/loongarch/
H A Dintroduction.rst127 0x42 定时器值 TVAL
/linux/Documentation/arch/loongarch/
H A Dintroduction.rst134 0x42 Timer Value TVAL
/linux/drivers/net/ethernet/synopsys/
H A Ddwc-xlgmac-hw.c2370 u32 tval; in xlgmac_set_rss_lookup_table() local
2373 tval = table[i]; in xlgmac_set_rss_lookup_table()
2378 tval); in xlgmac_set_rss_lookup_table()
/linux/tools/power/pm-graph/
H A Dsleepgraph.py4366 tVal = [float(data['suspend']), float(data['resume'])]
4368 data['time'], tVal[0], tVal[1], data['url'], res,
4381 tMed[i][tVal[i]] = idx
4382 tAvg[i] += tVal[i]
4383 if tMin[i] == 0 or tVal[i] < tMin[i]:
4385 tMin[i] = tVal[i]
4386 if tMax[i] == 0 or tVal[i] > tMax[i]:
4388 tMax[i] = tVal[i]
/linux/net/ipv6/
H A Daddrconf.c5174 long tval = (jiffies - READ_ONCE(ifa->tstamp)) / HZ; in inet6_fill_ifaddr() local
5176 if (preferred > tval) in inet6_fill_ifaddr()
5177 preferred -= tval; in inet6_fill_ifaddr()
5181 if (valid > tval) in inet6_fill_ifaddr()
5182 valid -= tval; in inet6_fill_ifaddr()
/linux/drivers/scsi/lpfc/
H A Dlpfc_hw.h2163 uint8_t tval; member
2171 uint8_t tval;

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